From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44485) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VK8jO-0002BX-Bp for qemu-devel@nongnu.org; Thu, 12 Sep 2013 11:22:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VK8jJ-0003cZ-QH for qemu-devel@nongnu.org; Thu, 12 Sep 2013 11:22:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:21717) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VK8jJ-0003cK-IR for qemu-devel@nongnu.org; Thu, 12 Sep 2013 11:22:49 -0400 Date: Thu, 12 Sep 2013 17:22:14 +0200 From: Igor Mammedov Message-ID: <20130912172214.69078ed7@nial.usersys.redhat.com> In-Reply-To: <089cbe1099eeb4defb5ff867eb2263eb902ed67d.1377075625.git.hutao@cn.fujitsu.com> References: <089cbe1099eeb4defb5ff867eb2263eb902ed67d.1377075625.git.hutao@cn.fujitsu.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 1/2] ich9: update sci on gpe write List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Hu Tao Cc: qemu-devel@nongnu.org On Wed, 21 Aug 2013 17:04:27 +0800 Hu Tao wrote: > OSPM may disable the sci by clearing GPEx_BLK EN bit, in the case > we have to set sci level to 0 or guest will receive sci interrupts > endlessly. Could you make a more verbose comment, referring to relevant ACPI spec chapter and it would be nice, if you experienced problem with linux guest, to add symptoms here as well. commit 633aa0ac did equivalent change to piix4 part, so it's worth to mention it here. > Signed-off-by: Hu Tao > --- > hw/acpi/ich9.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c > index 3fb443d..8717c15 100644 > --- a/hw/acpi/ich9.c > +++ b/hw/acpi/ich9.c > @@ -79,6 +79,8 @@ static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val, > { > ICH9LPCPMRegs *pm = opaque; > acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val); > + > + pm_update_sci(pm); > } > > static const MemoryRegionOps ich9_gpe_ops = {