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Date: Sun, 15 Sep 2013 17:08:56 +0300
From: "Michael S. Tsirkin" <mst@redhat.com>
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Subject: Re: [Qemu-devel] [PATCH RFC v2 2/2] hw/pci: handle unassigned pci
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>, Anthony Liguori <aliguori@us.ibm.com>, Jan Kiszka <jan.kiszka@siemens.com>, QEMU Developers <qemu-devel@nongnu.org>, Marcel Apfelbaum <marcel.a@redhat.com>

On Sun, Sep 15, 2013 at 02:49:32PM +0100, Peter Maydell wrote:
> On 15 September 2013 14:39, Michael S. Tsirkin <mst@redhat.com> wrote:
> > On Sun, Sep 15, 2013 at 02:24:07PM +0100, Peter Maydell wrote:
> >> Yes, that's true, but even then it's usually just "overlaps
> >> of subregions within a single container" and there isn't
> >> a need to worry about within-container versus outside-container
> >> interactions.
> 
> > Well actually if you look at the 'subregion collisions'
> > mail that I sent, must of the collisions are exactly
> > of this sort.
> >
> > For example, mcfg in q35 overlaps the pci hole, so
> > any pci bar can be made to overlap it.
> 
> Yes, but if we were applying a sensible set of priorities
> then you don't need to care at all about the contents
> of the pci hole container, because the pci hole will
> be at a lower priority then mcfg; so you don't get into
> this odd corner case of "what happens if the high
> priority container turns out not to have anything there".
> 
> -- PMM

So setting sensible priorities in this case would require figuring out
what happens on real hardware.
As long as no one investigated, I think we are better off
leaving this as undefined behaviour.

Again, the changes you proposed yourself to support MA status bit
means we will be using this weird feature on each and every
PCI bus :)

-- 
MST