From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50575) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VLG7L-0004Vk-QJ for qemu-devel@nongnu.org; Sun, 15 Sep 2013 13:28:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VLG7D-0004IN-JN for qemu-devel@nongnu.org; Sun, 15 Sep 2013 13:28:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:27379) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VLG7D-0004IJ-Ai for qemu-devel@nongnu.org; Sun, 15 Sep 2013 13:28:07 -0400 Date: Sun, 15 Sep 2013 20:30:13 +0300 From: "Michael S. Tsirkin" Message-ID: <20130915173012.GB2838@redhat.com> References: <1379261801-16969-1-git-send-email-marcel.a@redhat.com> <1379261801-16969-4-git-send-email-marcel.a@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1379261801-16969-4-git-send-email-marcel.a@redhat.com> Subject: Re: [Qemu-devel] [PATCH v4 3/3] hw/pci: handle downstream pci master abort List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcel Apfelbaum Cc: peter.maydell@linaro.org, aliguori@us.ibm.com, jan.kiszka@siemens.com, qemu-devel@nongnu.org, pbonzini@redhat.com, afaerber@suse.de On Sun, Sep 15, 2013 at 07:16:41PM +0300, Marcel Apfelbaum wrote: > A MemoryRegion with negative priority was created and > it spans over all the pci address space. > It "intercepts" the accesses to unassigned pci > address space and will follow the pci spec: > 1. returns -1 on read > 2. does nothing on write > > Note: setting the RECEIVED MASTER ABORT bit in the STATUS register > of the device that initiated the transaction will be > implemented in another series Fine though I'd like to see how it all works together before applying. > Note: This implementation handles only the reads/writes to > the pci address space that are done by the cpu.(downstream) Strange, I don't see where does the limitation come from. Looks like any read returns -1 - what did I miss. > > Signed-off-by: Marcel Apfelbaum > --- > Changes from v3: > - Addresses Michael S. Tsirkin comments > - Changed the name of the new Memory region to master_abort_mem > - Made master abort priority INT_MIN instead of -1 > - Removed handling of RECEIVED MASTER ABORT BIT; it will be taken > care in a different series > > Changes from v1: > - "pci-unassigned-mem" MemoryRegion resides now in PCIBus and not on > various Host Bridges > - "pci-unassgined-mem" does not have a ".valid.accept" field and > implements read write methods > > hw/pci/pci.c | 27 +++++++++++++++++++++++++++ > include/hw/pci/pci_bus.h | 1 + > 2 files changed, 28 insertions(+) > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index d00682e..9b12375 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -283,6 +283,24 @@ const char *pci_root_bus_path(PCIDevice *dev) > return rootbus->qbus.name; > } > > +static uint64_t master_abort_mem_read(void *opaque, hwaddr addr, unsigned size) > +{ > + return -1ULL; > +} > + > +static void master_abort_mem_write(void *opaque, hwaddr addr, uint64_t val, > + unsigned size) > +{ > +} > + > +static const MemoryRegionOps master_abort_mem_ops = { > + .read = master_abort_mem_read, > + .write = master_abort_mem_write, > + .endianness = DEVICE_NATIVE_ENDIAN, > +}; > + Please make it little endian. DEVICE_NATIVE_ENDIAN is almost always a bug. > +#define MASTER_ABORT_MEM_PRIORITY INT_MIN > + > static void pci_bus_init(PCIBus *bus, DeviceState *parent, > const char *name, > MemoryRegion *address_space_mem, > @@ -294,6 +312,15 @@ static void pci_bus_init(PCIBus *bus, DeviceState *parent, > bus->address_space_mem = address_space_mem; > bus->address_space_io = address_space_io; > > + > + memory_region_init_io(&bus->master_abort_mem, OBJECT(bus), > + &master_abort_mem_ops, bus, "pci-master-abort", > + memory_region_size(bus->address_space_mem)); > + memory_region_add_subregion_overlap(bus->address_space_mem, > + bus->address_space_mem->addr, > + &bus->master_abort_mem, > + MASTER_ABORT_MEM_PRIORITY); > + > /* host bridge */ > QLIST_INIT(&bus->child); > > diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h > index 9df1788..2ad5edb 100644 > --- a/include/hw/pci/pci_bus.h > +++ b/include/hw/pci/pci_bus.h > @@ -23,6 +23,7 @@ struct PCIBus { > PCIDevice *parent_dev; > MemoryRegion *address_space_mem; > MemoryRegion *address_space_io; > + MemoryRegion master_abort_mem; > > QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ > QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ > -- > 1.8.3.1