From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58106) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VO85Z-00018m-NM for qemu-devel@nongnu.org; Mon, 23 Sep 2013 11:30:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VO85T-0007eU-T0 for qemu-devel@nongnu.org; Mon, 23 Sep 2013 11:30:17 -0400 Received: from mail-pd0-f179.google.com ([209.85.192.179]:56185) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VO85T-0007eK-NT for qemu-devel@nongnu.org; Mon, 23 Sep 2013 11:30:11 -0400 Received: by mail-pd0-f179.google.com with SMTP id v10so3337339pde.24 for ; Mon, 23 Sep 2013 08:30:11 -0700 (PDT) Date: Mon, 23 Sep 2013 16:30:09 +0100 From: Christoffer Dall Message-ID: <20130923153009.GC19043@lvm> References: <1377288624-7418-1-git-send-email-christoffer.dall@linaro.org> <1377288624-7418-6-git-send-email-christoffer.dall@linaro.org> <20130920195043.GT7623@lvm> <20130920214607.GX7623@lvm> <20130923021446.GB19043@lvm> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH 5/5] hw: arm_gic_kvm: Add KVM VGIC save/restore logic List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "linaro-kernel@lists.linaro.org" , QEMU Developers , Patch Tracking , "kvmarm@lists.cs.columbia.edu" On Mon, Sep 23, 2013 at 09:02:44PM +0900, Peter Maydell wrote: > On 23 September 2013 11:14, Christoffer Dall > wrote: > > On Sat, Sep 21, 2013 at 06:38:19PM +0900, Peter Maydell wrote: > > (2) How does the arm_gic_kvm.c code detect the underlying host CPU that > > the kernel read the register from when it returned the value of the > > register to do the proper translation? I don't even want to think > > about how this will work on Big.Little... > > That's why the kernel does the translation, not userspace :-) > Ah yeah, I misread your previous mail as returning just the hardware state from the kernel. OK, I'll add this implementation definition of the register group to the kernel interface and to qemu's structure. -Christoffer