From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRIh2-0008Cw-Dh for qemu-devel@nongnu.org; Wed, 02 Oct 2013 05:26:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VRIgw-0003rT-AL for qemu-devel@nongnu.org; Wed, 02 Oct 2013 05:26:04 -0400 Received: from mx1.redhat.com ([209.132.183.28]:20384) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRIgw-0003rN-2Y for qemu-devel@nongnu.org; Wed, 02 Oct 2013 05:25:58 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r929PvVJ023491 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 2 Oct 2013 05:25:57 -0400 Date: Wed, 2 Oct 2013 12:28:18 +0300 From: "Michael S. Tsirkin" Message-ID: <20131002092818.GA26950@redhat.com> References: <524162DE.1080705@redhat.com> <20130925070116.GA5436@redhat.com> <1380098908.1968.30.camel@localhost.localdomain> <20130925085928.GA6175@redhat.com> <524BDEF3.9090102@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <524BDEF3.9090102@redhat.com> Subject: Re: [Qemu-devel] Attaching PCI devices to the PCIe root complex List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: libvir-list@redhat.com, qemu list , Laine Stump , marcel.a@redhat.com On Wed, Oct 02, 2013 at 10:53:07AM +0200, Paolo Bonzini wrote: > Il 25/09/2013 10:59, Michael S. Tsirkin ha scritto: > >> > I couldn't find on PCIe spec any mention that "Root Complex Integrated EndPoint" > >> > must be PCIe. But, from spec 1.3.2.3: > >> > - A Root Complex Integrated Endpoint must not require I/O resources claimed through BAR(s). > >> > - A Root Complex Integrated Endpoint must not generate I/O Requests. > >> > - A Root Complex Integrated Endpoint is required to support MSI or MSI-X or both if an > >> > interrupt resource is requested. > > Heh PCI-SIG keeps fighting against legacy interrupts and IO. > > But lots of hardware happily ignores these rules. > > And the reason is simple: software does not enforce them. > > I think it's "must not require", not "must not have". So it's the usual > rule that applies to PCIe device, i.e. that they should work even if the > OS doesn't enable the I/O BARs. I agree, thanks for pointing this out. Seems to still apply to the MSI rule. > Then I have no idea what the I/O BAR in i915 is for, and whether the > device can be used without that BAR. > > Paolo