From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56014) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VWQ6i-0002YZ-D7 for qemu-devel@nongnu.org; Wed, 16 Oct 2013 08:22:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VWQ6V-0004Rg-O9 for qemu-devel@nongnu.org; Wed, 16 Oct 2013 08:21:44 -0400 Received: from e06smtp14.uk.ibm.com ([195.75.94.110]:39937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VWQ6V-0004R1-Dd for qemu-devel@nongnu.org; Wed, 16 Oct 2013 08:21:31 -0400 Received: from /spool/local by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 16 Oct 2013 13:21:28 +0100 Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by d06dlp02.portsmouth.uk.ibm.com (Postfix) with ESMTP id 479F62190059 for ; Wed, 16 Oct 2013 13:21:26 +0100 (BST) Received: from d06av01.portsmouth.uk.ibm.com (d06av01.portsmouth.uk.ibm.com [9.149.37.212]) by b06cxnps3074.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id r9GCLDT865470676 for ; Wed, 16 Oct 2013 12:21:13 GMT Received: from d06av01.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av01.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id r9GCLPUA029612 for ; Wed, 16 Oct 2013 06:21:26 -0600 Date: Wed, 16 Oct 2013 14:21:23 +0200 From: Michael Mueller Message-ID: <20131016142123.375f47f8@bee> In-Reply-To: <525DC5E1.3090308@twiddle.net> References: <1380713622-22325-1-git-send-email-mimu@linux.vnet.ibm.com> <1380713622-22325-5-git-send-email-mimu@linux.vnet.ibm.com> <524D84CE.1000601@twiddle.net> <20131007124753.76c5ec84@bee> <525DC5E1.3090308@twiddle.net> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH RFC 04/11] s390/qemu: cpu model cpu facilitiy support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Tue, 15 Oct 2013 15:46:57 -0700 Richard Henderson wrote: > On 10/07/2013 03:47 AM, Michael Mueller wrote: > > A second reason for using 2k of memory here is to fully represent the facilities as defined > > in the s390x architecture. The SIE state needs it and I want to represent it identically in > > user space and KVM. Otherwise I would need a specific interface just for the facilities. > > If KVM needs the data in the format that you've got it in now, that's fair enough. > > Otherwise, 128 bits per s390 system seems nicer than 32 bits per facility. > I wrote it down with defines but it is really a mess, I need to double/tripple-check it: #define FAC0_CPU_S390_2064_GA1 \ ( FAC_BIT(0, FAC_N3) \ | FAC_BIT(0, FAC_ZARCH) \ | FAC_BIT(0, FAC_ZARCH_ACTIVE)) #define FAC1_CPU_S390_2064_GA1 0ul #define FAC0_CPU_S390_2064_GA2 \ ( FAC0_CPU_S390_2064_GA1 \ | FAC_BIT(0, FAC_EXTENDED_TRANSLATION_2)) #define FAC1_CPU_S390_2064_GA2 FAC1_CPU_S390_2064_GA1 #define FAC0_CPU_S390_2064_GA3 FAC0_CPU_S390_2064_GA2 #define FAC1_CPU_S390_2064_GA3 FAC1_CPU_S390_2064_GA2 #define FAC0_CPU_S390_2066_GA1 FAC0_CPU_S390_2064_GA3 #define FAC1_CPU_S390_2066_GA1 FAC0_CPU_S390_2064_GA3 #define FAC0_CPU_S390_2084_GA1 \ ( FAC0_CPU_S390_2064_GA3 \ | FAC_BIT(0, FAC_DAT_ENH) \ | FAC_BIT(0, FAC_MESSAGE_SECURITY_ASSIST) \ | FAC_BIT(0, FAC_LONG_DISPLACEMENT) \ | FAC_BIT(0, FAC_LONG_DISPLACEMENT_FAST) \ | FAC_BIT(0, FAC_HFP_MADDSUB)) #define FAC1_CPU_S390_2084_GA1 FAC1_CPU_S390_2064_GA3 #define FAC0_CPU_S390_2084_GA2 \ ( FAC0_CPU_S390_2084_GA1 \ | FAC_BIT(0, 4)) #define FAC1_CPU_S390_2084_GA2 FAC1_CPU_S390_2084_GA1 #define FAC0_CPU_S390_2084_GA3 \ ( FAC0_CPU_S390_2084_GA2 \ | FAC_BIT(0, FAC_ASN_LX_REUSE) \ | FAC_BIT(0, FAC_EXTENDED_TRANSLATION_3)) #define FAC1_CPU_S390_2084_GA3 FAC1_CPU_S390_2084_GA2 #define FAC0_CPU_S390_2084_GA4 FAC0_CPU_S390_2084_GA3 #define FAC1_CPU_S390_2084_GA4 FAC1_CPU_S390_2084_GA3 #define FAC0_CPU_S390_2084_GA5 \ ( FAC0_CPU_S390_2084_GA4 \ | FAC_BIT(0, FAC_TOD_CLOCK_STEERING)) #define FAC1_CPU_S390_2084_GA5 FAC1_CPU_S390_2084_GA4 #define FAC0_CPU_S390_2086_GA1 FAC0_CPU_S390_2084_GA3 #define FAC1_CPU_S390_2086_GA1 FAC1_CPU_S390_2084_GA3 #define FAC0_CPU_S390_2086_GA2 FAC0_CPU_S390_2084_GA4 #define FAC1_CPU_S390_2086_GA2 FAC1_CPU_S390_2084_GA4 #define FAC0_CPU_S390_2086_GA3 FAC0_CPU_S390_2084_GA5 #define FAC1_CPU_S390_2086_GA3 FAC1_CPU_S390_2084_GA5 #define FAC0_CPU_S390_2094_GA1 \ ( FAC0_CPU_S390_2084_GA5 \ | FAC_BIT(0, FAC_STFLE) \ | FAC_BIT(0, FAC_EXTENDED_IMMEDIATE) \ | FAC_BIT(0, FAC_HFP_UNNORMALIZED_EXT) \ | FAC_BIT(0, FAC_ETF2_ENH) \ | FAC_BIT(0, FAC_STORE_CLOCK_FAST) \ | FAC_BIT(0, FAC_ETF3_ENH) \ | FAC_BIT(0, FAC_EXTRACT_CPU_TIME)) #define FAC1_CPU_S390_2094_GA1 FAC1_CPU_S390_2084_GA5 #define FAC0_CPU_S390_2094_GA2 \ ( FAC0_CPU_S390_2094_GA1 \ | FAC_BIT(0, FAC_SENSE_RUNNING_STATUS) \ | FAC_BIT(0, FAC_MOVE_WITH_OPTIONAL_SPEC) \ | FAC_BIT(0, FAC_COMPARE_AND_SWAP_AND_STORE) \ | FAC_BIT(0, FAC_FLOATING_POINT_SUPPPORT_ENH) \ | FAC_BIT(0, FAC_DFP)) #define FAC1_CPU_S390_2094_GA2 FAC1_CPU_S390_2094_GA1 #define FAC0_CPU_S390_2094_GA3 \ ( FAC0_CPU_S390_2094_GA2 \ | FAC_BIT(0, FAC_PFPO)) #define FAC1_CPU_S390_2094_GA3 FAC1_CPU_S390_2094_GA2 #define FAC0_CPU_S390_2096_GA1 FAC0_CPU_S390_2094_GA3 #define FAC1_CPU_S390_2096_GA1 FAC1_CPU_S390_2094_GA3 #define FAC0_CPU_S390_2096_GA2 FAC0_CPU_S390_2096_GA1 #define FAC1_CPU_S390_2096_GA2 FAC1_CPU_S390_2096_GA1 #define FAC0_CPU_S390_2097_GA1 \ ( FAC0_CPU_S390_2094_GA3 \ | FAC_BIT(0, FAC_ENHANCED_DAT_1) \ | FAC_BIT(0, FAC_CONDITIONAL_SSKE) \ | FAC_BIT(0, FAC_CONFIGURATION_TOPOLOGY) \ | FAC_BIT(0, FAC_PARSING_ENH) \ | FAC_BIT(0, FAC_COMPARE_AND_SWAP_AND_STORE_2) \ | FAC_BIT(0, FAC_GENERAL_INSTRUCTIONS_EXT) \ | FAC_BIT(0, FAC_EXECUTE_EXT) \ | FAC_BIT(0, FAC_DFP_FAST)) #define FAC1_CPU_S390_2097_GA1 FAC1_CPU_S390_2094_GA3 #define FAC0_CPU_S390_2097_GA2 FAC0_CPU_S390_2097_GA1 #define FAC1_CPU_S390_2097_GA2 \ ( FAC1_CPU_S390_2097_GA1 \ | FAC_BIT(1, 65) \ | FAC_BIT(1, FAC_CPU_MEASUREMENT_COUNTER) \ | FAC_BIT(1, FAC_CPU_MEASUREMENT_SAMPLING)) #define FAC0_CPU_S390_2097_GA3 \ ( FAC0_CPU_S390_2097_GA2 \ | FAC_BIT(0, FAC_SET_PROGRAM_PARAMETERS)) #define FAC1_CPU_S390_2097_GA3 FAC1_CPU_S390_2097_GA2 #define FAC0_CPU_S390_2098_GA1 FAC0_CPU_S390_2097_GA2 #define FAC1_CPU_S390_2098_GA1 FAC1_CPU_S390_2097_GA2 #define FAC0_CPU_S390_2098_GA2 FAC0_CPU_S390_2097_GA3 #define FAC1_CPU_S390_2098_GA2 FAC1_CPU_S390_2097_GA3 #define FAC0_CPU_S390_2817_GA1 \ ( FAC0_CPU_S390_2097_GA3 \ | FAC_BIT(0, FAC_ENHANCED_MONITOR) \ | FAC_BIT(0, FAC_FLOATING_POINT_EXT) \ | FAC_BIT(0, FAC_MULTI_45) \ | FAC_BIT(0, 46)) #define FAC1_CPU_S390_2817_GA1 \ ((FAC1_CPU_S390_2097_GA3 \ & ~FAC_BIT(1, 65)) \ | FAC_BIT(1, FAC_ACCESS_EXCEPTION_FS_INDICATION)) #define FAC0_CPU_S390_2817_GA2 \ ( FAC0_CPU_S390_2817_GA1 \ | FAC_BIT(0, FAC_IPTE_RANGE) \ | FAC_BIT(0, FAC_NONQ_KEY_SETTING) \ | FAC_BIT(0, FAC_CMPSC_ENH)) #define FAC1_CPU_S390_2817_GA2 \ ( FAC1_CPU_S390_2817_GA1 \ | FAC_BIT(1, FAC_RESET_REFERENCE_BITS_MULTIPLE) \ | FAC_BIT(1, FAC_MESSAGE_SECURITY_ASSIST_3) \ | FAC_BIT(1, FAC_MESSAGE_SECURITY_ASSIST_4)) #define FAC0_CPU_S390_2818_GA1 FAC0_CPU_S390_2817_GA2 #define FAC1_CPU_S390_2818_GA1 FAC1_CPU_S390_2817_GA2 #define FAC0_CPU_S390_2827_GA1 \ ( FAC0_CPU_S390_2817_GA2 \ | FAC_BIT(0, FAC_DFP_ZONED_CONVERSION) \ | FAC_BIT(0, FAC_MULTI_49) \ | FAC_BIT(0, FAC_CONSTRAINT_TRANSACTIONAL_EXE) \ | FAC_BIT(0, FAC_LOCAL_TLB_CLEARING) \ | FAC_BIT(0, FAC_INTERLOCKED_ACCESS_2)) #define FAC1_CPU_S390_2827_GA1 \ ( FAC1_CPU_S390_2817_GA2 \ | FAC_BIT(1, FAC_TRANSACTIONAL_EXE) \ | FAC_BIT(1, FAC_ENHANCED_DAT_2)) #define FAC0_CPU_S390_2827_GA2 FAC0_CPU_S390_2827_GA1 #define FAC1_CPU_S390_2827_GA2 FAC1_CPU_S390_2827_GA1 #define FAC0_CPU_S390_2828_GA1 FAC0_CPU_S390_2827_GA2 #define FAC1_CPU_S390_2828_GA1 FAC1_CPU_S390_2827_GA2