From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37075) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VX8ON-0006Ro-Qr for qemu-devel@nongnu.org; Fri, 18 Oct 2013 07:39:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VX8OI-0006ew-C3 for qemu-devel@nongnu.org; Fri, 18 Oct 2013 07:38:55 -0400 Received: from mail-ee0-x230.google.com ([2a00:1450:4013:c00::230]:60980) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VX8OI-0006em-5K for qemu-devel@nongnu.org; Fri, 18 Oct 2013 07:38:50 -0400 Received: by mail-ee0-f48.google.com with SMTP id e50so819908eek.21 for ; Fri, 18 Oct 2013 04:38:49 -0700 (PDT) Date: Fri, 18 Oct 2013 13:38:47 +0200 From: Stefan Hajnoczi Message-ID: <20131018113847.GA17031@stefanha-thinkpad.redhat.com> References: <1382063402-30359-1-git-send-email-roy.franz@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1382063402-30359-1-git-send-email-roy.franz@linaro.org> Subject: Re: [Qemu-devel] [PATCH] block: mask NOR flash buffered write length List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Roy Franz Cc: kwolf@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, patches@linaro.org On Thu, Oct 17, 2013 at 07:30:02PM -0700, Roy Franz wrote: > For buffered writes, mask the length with the maximum supported > length. This is required for block writes to work on the ARM vexpress > platform, where the flash interface is 32 bits wide. For buffered writes > to the 2 16 bit flashes on the interface, the length is repeated in each > 16 bit word, and without this mask the two lengths are interpreted > as a single 32 bit value that is very large. > > Signed-off-by: Roy Franz > --- > hw/block/pflash_cfi01.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c > index 018a967..a364cca 100644 > --- a/hw/block/pflash_cfi01.c > +++ b/hw/block/pflash_cfi01.c > @@ -378,6 +378,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, > > break; > case 0xe8: > + value &= pfl->writeblock_size - 1; This patch feels weird. Should the 32-bit interface width be truncated down to 16 bits before dispatching pflash_write()? It's not clear to me that truncating just in this specific case is correct. But then I don't know the hardware :). Stefan