Re: [Qemu-devel] [PATCH 04/20] tcg-ia64: Simplify brcond

[Aurelien Jarno <aurelien@aurel32.net>]

On Mon, Nov 04, 2013 at 02:24:59PM +1000, Richard Henderson wrote:
> On 11/04/2013 09:34 AM, Richard Henderson wrote:
> > On 11/03/2013 12:56 PM, Aurelien Jarno wrote:
> >> That said the implementation is likely wrong as with this patch applied,
> >> qemu-system-x86_64 is not even able to execute seabios to the first
> >> printed message. Please do at least basic testing.
> > 
> > Really?  I'll look into it.
> > 
> > I do basic testing -- arm, sparc, alpha.  Those are the ones that can
> > usefully boot via serial console instead of having to set up a tunnel
> > for a vnc viewer.
> 
> Yes indeed, there's a bug.  This additional patch is required:
> 
> diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
> index 2fdc38a..e0413d9 100644
> --- a/tcg/ia64/tcg-target.c
> +++ b/tcg/ia64/tcg-target.c
> @@ -2359,7 +2359,7 @@ static const TCGTargetOpDef ia64_op_defs[] = {
>      { INDEX_op_bswap32_i64, { "r", "rZ" } },
>      { INDEX_op_bswap64_i64, { "r", "rZ" } },
> 
> -    { INDEX_op_brcond_i64, { "rI", "rI" } },
> +    { INDEX_op_brcond_i64, { "rZ", "rZ" } },
>      { INDEX_op_setcond_i64, { "r", "rZ", "rZ" } },
>      { INDEX_op_movcond_i64, { "r", "rZ", "rZ", "rI", "rI" } },
> 
> 
> I managed to change the constraints for brcond_i32 but forget its brother.
> Naturally, arm and sparc don't excercise brcond_i64, and as it happens alpha
> would have only generated brcond_i64 vs zero and not seen the problem.

I confirm this fixes the problem, provided that you squash the patch
above in the patch:

Acked-by: Aurelien Jarno <aurelien@aurel32.net>

> Will be fixed in v3.  Do you see anything else in the patch set?

I am still looking at it, trying to bisect regressions.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net