From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37604) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VhGmg-0004so-Rv for qemu-devel@nongnu.org; Fri, 15 Nov 2013 05:38:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VhGmY-0001Pi-FV for qemu-devel@nongnu.org; Fri, 15 Nov 2013 05:37:54 -0500 Date: Fri, 15 Nov 2013 11:37:07 +0100 From: "Edgar E. Iglesias" Message-ID: <20131115103707.GS32202@zapo.xilinx.com> References: <20131107161330.GB31594@smtp.vpn> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] Does QEMU support MIPS SMP2 malta board? List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nancy Cc: qemu-devel@nongnu.org, qemu-discuss@nongnu.org On Fri, Nov 15, 2013 at 05:48:03PM +0800, Nancy wrote: > It works with -cpu 34Kf, but why cpuinfo display MIPS 34Kc? I don't know, maybe Linux doesn't differentiate them? Or qemu has the wrong prid for the 34Kf? > I notes the smp based on kvm implement, but there do not have kvm > implement under target-mips? how this smp implement? Is there any > document record the QEMU MIPS smp internal? The emulated (TCG) SMP support implements parts of the MIPS MT ASE. On malta, -smp is a bit of a missuse, it controls the nr of VPEs and -smp threads=x controls the nr of TCs. IIRC the SMTC mechanisms are incomplete, both in the kernel and in QEMU so for example -smp 2,threads=2 wont work. Not sure what you mean with "based on KVM" but The TCG support for MT was added independently and AFAIK before KVM mips was published. Cheers, Edgar > > Does QEMU for MIPS target support FPU, SIMD instruction? > > cat /proc/cpuinfo > system type : MIPS Malta > machine : Unknown > processor : 0 > cpu model : MIPS 34Kc V0.0 FPU V0.0 > BogoMIPS : 875.72 > wait instruction : yes > microsecond timers : yes > tlb_entries : 16 > extra interrupt vector : yes > hardware watchpoint : yes, count: 1, address/irw mask: [0x0ff8] > isa : mips1 mips2 mips32r1 mips32r2 > ASEs implemented : mips16 dsp mt > shadow register sets : 16 > kscratch registers : 0 > core : 0 > VCED exceptions : not available > VCEI exceptions : not available > > processor : 1 > cpu model : MIPS 34Kc V0.0 FPU V0.0 > BogoMIPS : 841.31 > wait instruction : yes > microsecond timers : yes > tlb_entries : 16 > extra interrupt vector : yes > hardware watchpoint : yes, count: 1, address/irw mask: [0x0ff8] > isa : mips1 mips2 mips32r1 mips32r2 > ASEs implemented : mips16 dsp mt > shadow register sets : 16 > kscratch registers : 0 > core : 1 > VCED exceptions : not available > VCEI exceptions : not available > > On Fri, Nov 8, 2013 at 12:13 AM, Edgar E. Iglesias > wrote: > > On Thu, Oct 31, 2013 at 11:47:12AM +0800, Nancy wrote: > >> Hi, > >> > >> Does QEMU support MIPS smp 2 malta board? > >> > >> $ qemu-system-mipsel -M malta -kernel vmlinux -initrd ramfs.cpio.gz \ > >> -append "console=ttyS0 root=/dev/ram0 maxcpus=2" -nographic -s \ > >> -smp 2 > >> > > > > .... > > > >> > >> > >> There's no problem while I removing "-smp 2" option. (plus the kernel > >> MIPS configure file " malta_defconfig" support smp 2 ) > > > > > > Hi, > > > > Yes it should work. > > Can you please try again with -cpu 34Kf? > > > > Cheers, > > Edgar > > > > -- > Best Regards, > Yu Rong Tan