From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60782) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VpOci-0003aO-RZ for qemu-devel@nongnu.org; Sat, 07 Dec 2013 15:37:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VpOcb-0005Lm-OM for qemu-devel@nongnu.org; Sat, 07 Dec 2013 15:37:12 -0500 Received: from mail-la0-x230.google.com ([2a00:1450:4010:c03::230]:47399) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VpOcb-0005Le-GW for qemu-devel@nongnu.org; Sat, 07 Dec 2013 15:37:05 -0500 Received: by mail-la0-f48.google.com with SMTP id n7so784794lam.21 for ; Sat, 07 Dec 2013 12:37:04 -0800 (PST) Date: Sun, 8 Dec 2013 00:44:27 +0400 From: Antony Pavlov Message-Id: <20131208004427.737a11497cfe45874a93a517@gmail.com> In-Reply-To: References: <1386377704-1350-1-git-send-email-antonynpavlov@gmail.com> <1386377704-1350-2-git-send-email-antonynpavlov@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC 1/2] ARM: cpu: add "hivecs" property (high vectors on reset) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , "qemu-devel@nongnu.org Developers" On Sat, 7 Dec 2013 11:00:05 +1000 Peter Crosthwaite wrote: > On Sat, Dec 7, 2013 at 10:55 AM, Antony Pavlov = wrote: > > Signed-off-by: Antony Pavlov > > --- > > target-arm/cpu-qom.h | 1 + > > target-arm/cpu.c | 13 +++++++++++++ > > 2 files changed, 14 insertions(+) > > > > diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h > > index b55306a..116320c 100644 > > --- a/target-arm/cpu-qom.h > > +++ b/target-arm/cpu-qom.h > > @@ -128,6 +128,7 @@ typedef struct ARMCPU { > > uint32_t ccsidr[16]; > > uint32_t reset_cbar; > > uint32_t reset_auxcr; > > + bool reset_hivecs; > > } ARMCPU; > > > > #define TYPE_AARCH64_CPU "aarch64-cpu" > > diff --git a/target-arm/cpu.c b/target-arm/cpu.c > > index d40f2a7..f838499 100644 > > --- a/target-arm/cpu.c > > +++ b/target-arm/cpu.c > > @@ -20,6 +20,7 @@ > > > > #include "cpu.h" > > #include "qemu-common.h" > > +#include "hw/qdev-properties.h" > > #if !defined(CONFIG_USER_ONLY) > > #include "hw/loader.h" > > #endif > > @@ -119,6 +120,12 @@ static void arm_cpu_reset(CPUState *s) > > env->regs[15] =3D pc & ~1; > > } > > } > > + > > + if (cpu->reset_hivecs) { > > + uint32_t c1_sys =3D env->cp15.c1_sys; > > + env->cp15.c1_sys =3D c1_sys | (1 << 13); >=20 > Why the read modify write? Cant you do it as a one-liner |=3D ? >=20 > env->cp15.c1_sys |=3D (1 << 13); >=20 > > + } > > + > > env->vfp.xregs[ARM_VFP_FPEXC] =3D 0; > > #endif > > set_flush_to_zero(1, &env->vfp.standard_fp_status); > > @@ -854,6 +861,11 @@ typedef struct ARMCPUInfo { > > void (*class_init)(ObjectClass *oc, void *data); > > } ARMCPUInfo; > > > > +static Property arm_cpu_properties[] =3D { > > + DEFINE_PROP_BOOL("hivecs", ARMCPU, reset_hivecs, false), >=20 > As this is indicating a reset value, "reset" should feature in the > property name. >=20 > > + DEFINE_PROP_END_OF_LIST(), > > +}; > > + > > static const ARMCPUInfo arm_cpus[] =3D { > > #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) > > { .name =3D "arm926", .initfn =3D arm926_initfn }, > > @@ -902,6 +914,7 @@ static void arm_cpu_class_init(ObjectClass *oc, voi= d *data) > > > > acc->parent_realize =3D dc->realize; > > dc->realize =3D arm_cpu_realizefn; > > + dc->props =3D arm_cpu_properties; >=20 > This unconditionally adds the property to all ARM CPUs, wheras its > only valid for a subset of ARM CPUs (!M). Check the earlier patches in > the CBAR/highbank/zynq series on list for the change pattern for > adding it as a conditional dynamic property instead. I'll take it into Is there any public repo with this changes? > that series if you want to rebase onto my patch set (will save you > having to conflict by adding post-init fn which is still absent from > mainline). >=20 > Regards, > Peter >=20 > > > > acc->parent_reset =3D cc->reset; > > cc->reset =3D arm_cpu_reset; > > -- > > 1.8.5 > > > > --=20 --=A0 Best regards, =A0 Antony Pavlov