From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vq3FD-0006kn-Aw for qemu-devel@nongnu.org; Mon, 09 Dec 2013 10:59:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Vq3FB-00057H-Op for qemu-devel@nongnu.org; Mon, 09 Dec 2013 10:59:39 -0500 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:35381) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Vq3FB-00057D-Iy for qemu-devel@nongnu.org; Mon, 09 Dec 2013 10:59:37 -0500 Date: Mon, 9 Dec 2013 16:59:34 +0100 From: Aurelien Jarno Message-ID: <20131209155934.GA14241@ohm.rr44.fr> References: <1385323385-25756-1-git-send-email-koorogi@koorogi.info> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1385323385-25756-1-git-send-email-koorogi@koorogi.info> Subject: Re: [Qemu-devel] [PATCH] target-sh4: move features flag after CPU_COMMON List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bobby Bingham Cc: qemu-devel@nongnu.org On Sun, Nov 24, 2013 at 02:03:05PM -0600, Bobby Bingham wrote: > Everything before CPU_COMMON in the structure is cleared as part of a > CPU reset. This included the features flag, which indicates whether SH4A > instructions are supported or not. As a result, a CPU reset downgraded > the CPU from an SH4A to an SH4. > > Signed-off-by: Bobby Bingham > --- > target-sh4/cpu.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h > index 276d295..c181dda 100644 > --- a/target-sh4/cpu.h > +++ b/target-sh4/cpu.h > @@ -157,9 +157,6 @@ typedef struct CPUSH4State { > /* float point status register */ > float_status fp_status; > > - /* The features that we should emulate. See sh_features above. */ > - uint32_t features; > - > /* Those belong to the specific unit (SH7750) but are handled here */ > uint32_t mmucr; /* MMU control register */ > uint32_t pteh; /* page table entry high register */ > @@ -180,6 +177,9 @@ typedef struct CPUSH4State { > > int id; /* CPU model */ > > + /* The features that we should emulate. See sh_features above. */ > + uint32_t features; > + > void *intc_handle; > int in_sleep; /* SR_BL ignored during sleep */ > memory_content *movcal_backup; Thanks, applied. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net