* [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet
@ 2013-12-08 9:38 Liu Ping Fan
2013-12-08 9:38 ` [Qemu-devel] [PATCH 1/2] hpet: inverse polarity when pin above ISA_NUM_IRQS Liu Ping Fan
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Liu Ping Fan @ 2013-12-08 9:38 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Michael S. Tsirkin
I see the open of 2.0 development window, and rebase V8 with a small fix
v9:
use PC_Q35_1_8_MACHINE_OPTIONS in pc_q35_machine_v1_8
v8:
make piix/q35 compat diverge
simplify the code, use hpet_irqs to pass "intcap" value
Liu Ping Fan (2):
hpet: inverse polarity when pin above ISA_NUM_IRQS
hpet: enable to entitle more irq pins for hpet
hw/i386/pc.c | 19 ++++++++++++++++---
hw/i386/pc_piix.c | 3 ++-
hw/i386/pc_q35.c | 21 +++++++++++++++++----
hw/timer/hpet.c | 23 +++++++++++++++++++----
include/hw/i386/pc.h | 24 +++++++++++++++++++++++-
5 files changed, 77 insertions(+), 13 deletions(-)
--
1.8.1.4
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH 1/2] hpet: inverse polarity when pin above ISA_NUM_IRQS
2013-12-08 9:38 [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Liu Ping Fan
@ 2013-12-08 9:38 ` Liu Ping Fan
2013-12-09 14:50 ` [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Paolo Bonzini
2013-12-10 10:01 ` Michael S. Tsirkin
2 siblings, 0 replies; 4+ messages in thread
From: Liu Ping Fan @ 2013-12-08 9:38 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Michael S. Tsirkin
According to hpet spec, hpet irq is high active. But according to
ICH spec, there is inversion before the input of ioapic. So the OS
will expect low active on this IRQ line. (On bare metal, if OS driver
claims high active on this line, spurious irq is generated)
We fold the emulation of this inversion inside the hpet logic.
Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
---
hw/timer/hpet.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 2eb75ea..0aee2c1 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set)
if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) {
s->isr &= ~mask;
if (!timer_fsb_route(timer)) {
- qemu_irq_lower(s->irqs[route]);
+ /* fold the ICH PIRQ# pin's internal inversion logic into hpet */
+ if (route >= ISA_NUM_IRQS) {
+ qemu_irq_raise(s->irqs[route]);
+ } else {
+ qemu_irq_lower(s->irqs[route]);
+ }
}
} else if (timer_fsb_route(timer)) {
stl_le_phys(timer->fsb >> 32, timer->fsb & 0xffffffff);
} else if (timer->config & HPET_TN_TYPE_LEVEL) {
s->isr |= mask;
- qemu_irq_raise(s->irqs[route]);
+ /* fold the ICH PIRQ# pin's internal inversion logic into hpet */
+ if (route >= ISA_NUM_IRQS) {
+ qemu_irq_lower(s->irqs[route]);
+ } else {
+ qemu_irq_raise(s->irqs[route]);
+ }
} else {
s->isr &= ~mask;
qemu_irq_pulse(s->irqs[route]);
--
1.8.1.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet
2013-12-08 9:38 [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Liu Ping Fan
2013-12-08 9:38 ` [Qemu-devel] [PATCH 1/2] hpet: inverse polarity when pin above ISA_NUM_IRQS Liu Ping Fan
@ 2013-12-09 14:50 ` Paolo Bonzini
2013-12-10 10:01 ` Michael S. Tsirkin
2 siblings, 0 replies; 4+ messages in thread
From: Paolo Bonzini @ 2013-12-09 14:50 UTC (permalink / raw)
To: Liu Ping Fan; +Cc: qemu-devel, Michael S. Tsirkin
Il 08/12/2013 10:38, Liu Ping Fan ha scritto:
> I see the open of 2.0 development window, and rebase V8 with a small fix
>
> v9:
> use PC_Q35_1_8_MACHINE_OPTIONS in pc_q35_machine_v1_8
> v8:
> make piix/q35 compat diverge
> simplify the code, use hpet_irqs to pass "intcap" value
>
>
> Liu Ping Fan (2):
> hpet: inverse polarity when pin above ISA_NUM_IRQS
> hpet: enable to entitle more irq pins for hpet
>
> hw/i386/pc.c | 19 ++++++++++++++++---
> hw/i386/pc_piix.c | 3 ++-
> hw/i386/pc_q35.c | 21 +++++++++++++++++----
> hw/timer/hpet.c | 23 +++++++++++++++++++----
> include/hw/i386/pc.h | 24 +++++++++++++++++++++++-
> 5 files changed, 77 insertions(+), 13 deletions(-)
>
Reviewwed-by: Paolo Bonzini <pbonzini@redhat.com>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet
2013-12-08 9:38 [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Liu Ping Fan
2013-12-08 9:38 ` [Qemu-devel] [PATCH 1/2] hpet: inverse polarity when pin above ISA_NUM_IRQS Liu Ping Fan
2013-12-09 14:50 ` [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Paolo Bonzini
@ 2013-12-10 10:01 ` Michael S. Tsirkin
2 siblings, 0 replies; 4+ messages in thread
From: Michael S. Tsirkin @ 2013-12-10 10:01 UTC (permalink / raw)
To: Liu Ping Fan; +Cc: Paolo Bonzini, qemu-devel
On Sun, Dec 08, 2013 at 05:38:15PM +0800, Liu Ping Fan wrote:
> I see the open of 2.0 development window, and rebase V8 with a small fix
>
> v9:
> use PC_Q35_1_8_MACHINE_OPTIONS in pc_q35_machine_v1_8
> v8:
> make piix/q35 compat diverge
> simplify the code, use hpet_irqs to pass "intcap" value
>
Applied, thanks.
> Liu Ping Fan (2):
> hpet: inverse polarity when pin above ISA_NUM_IRQS
> hpet: enable to entitle more irq pins for hpet
>
> hw/i386/pc.c | 19 ++++++++++++++++---
> hw/i386/pc_piix.c | 3 ++-
> hw/i386/pc_q35.c | 21 +++++++++++++++++----
> hw/timer/hpet.c | 23 +++++++++++++++++++----
> include/hw/i386/pc.h | 24 +++++++++++++++++++++++-
> 5 files changed, 77 insertions(+), 13 deletions(-)
>
> --
> 1.8.1.4
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2013-12-10 9:57 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-12-08 9:38 [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Liu Ping Fan
2013-12-08 9:38 ` [Qemu-devel] [PATCH 1/2] hpet: inverse polarity when pin above ISA_NUM_IRQS Liu Ping Fan
2013-12-09 14:50 ` [Qemu-devel] [PATCH v9 0/2] bugs fix for hpet Paolo Bonzini
2013-12-10 10:01 ` Michael S. Tsirkin
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).