From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52141) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtDwp-00034m-Fx for qemu-devel@nongnu.org; Wed, 18 Dec 2013 05:01:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VtDwj-00022V-Gb for qemu-devel@nongnu.org; Wed, 18 Dec 2013 05:01:47 -0500 Received: from mx1.redhat.com ([209.132.183.28]:30882) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VtDwj-00022Q-9N for qemu-devel@nongnu.org; Wed, 18 Dec 2013 05:01:41 -0500 Date: Wed, 18 Dec 2013 12:05:29 +0200 From: "Michael S. Tsirkin" Message-ID: <20131218100529.GA6741@redhat.com> References: <1387185088-16811-1-git-send-email-kraxel@redhat.com> <20131216115401.GA19233@redhat.com> <1387201577.28883.38.camel@nilsson.home.kraxel.org> <20131216192843.GB21330@redhat.com> <1387277686.12500.35.camel@nilsson.home.kraxel.org> <20131217115936.GA30168@redhat.com> <1387302966.12500.85.camel@nilsson.home.kraxel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1387302966.12500.85.camel@nilsson.home.kraxel.org> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2] x86: gigabyte alignment for ram List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: qemu-devel@nongnu.org, Anthony Liguori On Tue, Dec 17, 2013 at 06:56:06PM +0100, Gerd Hoffmann wrote: > Hi, >=20 > > > We need to change the way we reserve the mmconfig space though. =20 > > >=20 > > > Currently it is marked reserved in the e820 table. Having that ove= rlap > > > with the _CRS region makes windows quite unhappy, we tried that > > > recently. > >=20 > > Yes this also contradicts the spec, see below. > >=20 > > > My laptop has the mmconfig space declared as LPC ressource: > > >=20 > > > Device (LPC) > > > { > > > Name (_ADR, 0x001F0000) // _ADR: Address > > > Name (_S3D, 0x03) // _S3D: S3 Device State > > > Name (RID, 0x00) > > > Device (SIO) > > > { > > > Name (_HID, EisaId ("PNP0C02")) > > > Name (_UID, 0x00) // _UID: Unique ID > > > Name (SCRS, ResourceTemplate () > > > [ ... ] > > > Memory32Fixed (ReadWrite, > > > 0xF8000000, // Address Base > > > 0x04000000, // Address Length > > > ) > > > [ ... ] > > > Method (_CRS, 0, NotSerialized) > > > [ ... return SCRS, with updates applied in some cases ... ] > > >=20 > > > When doing it this way we can simply make the PCI0._CRS cover the w= hole > > > end-of-ram -> ioapic-base range, simliar to piix, and we are pretty= free > > > to place the mmconfig xbar anywhere in that area. > >=20 > > The spec says: >=20 > > (under \_SB) in a node with a _HID of EISAID (PNP0C02), >=20 > So this is what my laptop does. >=20 > > and the > > resources in this case > > should not be claimed in the root PCI bus=E2=80=99s _CRS. >=20 > My laptop has them in the root bus _CRS though: >=20 > [ 0.124634] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in > ACPI motherboard resources >=20 > [ 0.139391] pci_bus 0000:00: root bus resource [mem > 0xdfa00000-0xfebfffff] >=20 > > The resources can > > optionally be returned in > > Int15 E820 or EFIGetMemoryMap as reserved memory but must always be > > reported through > > ACPI as a motherboard resource. >=20 > So we can do both e820 and motherboard ressource. Good, that hopefully > simplifies the transition. >=20 > > My reading of the above is that this can be an LPC resource but > > claiming this as the root's _CRS isn't ok then. >=20 > I read the specs the same way, but my laptop does something different. >=20 > Guess that needs quite some testing to figure which works best ... >=20 > > I merged your patch but split it: q35 is separate and piix > > is separate. Would you like me to drop the q35 part then? >=20 > If you are fine with q35 having only 2G lowmem keep it. It's safe. >=20 > We can sort the mmconfig setup afterwards, then check if (and how) we'l= l > transition to 3G lowmem. Maybe we simply don't after all, with the > world moving to 64bit it doesn't matter that much whenever memory is > mapped above or below 4g. And for old 32bit guests there is always the > option to stick with piix which continues to offers up to 3.5G lowmem. >=20 > cheers, > Gerd >=20 I'll think it over, I will keep the patch around but won't merge to Anthony meanwhile. --=20 MST