From: Aurelien Jarno <aurelien@aurel32.net>
To: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Gleb Natapov <gleb@redhat.com>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
Sanjay Lal <sanjayl@kymasys.com>
Subject: Re: [Qemu-devel] [PATCH v2 04/10] target-mips: get_physical_address: Add KVM awareness
Date: Sat, 21 Dec 2013 16:34:17 +0100 [thread overview]
Message-ID: <20131221153417.GA9151@ohm.rr44.fr> (raw)
In-Reply-To: <1387203165-5553-5-git-send-email-james.hogan@imgtec.com>
On Mon, Dec 16, 2013 at 02:12:39PM +0000, James Hogan wrote:
> MIPS KVM trap & emulate mode (which is currently the only supported
> mode) has to add an extra kseg0/kseg1 at 0x40000000 and an extra
> kseg2/kseg3 at 0x60000000. Take this into account in
> get_physical_address() so that debug memory access works.
>
> This is done by translating the address to a standard kseg0 or kseg2
> address before doing the normal address translation. The real virtual
> address is still used for TLB lookups.
>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
> target-mips/helper.c | 33 ++++++++++++++++++++++++++-------
> 1 file changed, 26 insertions(+), 7 deletions(-)
>
> diff --git a/target-mips/helper.c b/target-mips/helper.c
> index 2e96655..c4be887 100644
> --- a/target-mips/helper.c
> +++ b/target-mips/helper.c
> @@ -24,6 +24,7 @@
> #include <signal.h>
>
> #include "cpu.h"
> +#include "sysemu/kvm.h"
>
> enum {
> TLBRET_DIRTY = -4,
> @@ -100,7 +101,7 @@ int r4k_map_address (CPUMIPSState *env, hwaddr *physical, int *prot,
> }
>
> static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> - int *prot, target_ulong address,
> + int *prot, target_ulong real_address,
> int rw, int access_type)
> {
> /* User mode can only access useg/xuseg */
> @@ -113,6 +114,8 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0;
> #endif
> int ret = TLBRET_MATCH;
> + /* effective address (modified for KVM T&E kernel segments) */
> + target_ulong address = real_address;
>
> #if 0
> qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
> @@ -124,19 +127,35 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> #define KSEG2_BASE 0xC0000000UL
> #define KSEG3_BASE 0xE0000000UL
>
> +#define KVM_KSEG0_BASE 0x40000000UL
> +#define KVM_KSEG2_BASE 0x60000000UL
> +
> + if (kvm_enabled()) {
> + /* KVM T&E adds guest kernel segments in useg */
> + if (real_address >= KVM_KSEG0_BASE) {
> + if (real_address < KVM_KSEG2_BASE) {
> + /* kseg0 */
> + address += KSEG0_BASE - KVM_KSEG0_BASE;
> + } else if (real_address <= USEG_LIMIT) {
> + /* kseg2/3 */
> + address += KSEG2_BASE - KVM_KSEG2_BASE;
> + }
> + }
> + }
> +
> if (address <= USEG_LIMIT) {
> /* useg */
> if (env->CP0_Status & (1 << CP0St_ERL)) {
> *physical = address & 0xFFFFFFFF;
> *prot = PAGE_READ | PAGE_WRITE;
> } else {
> - ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
> + ret = env->tlb->map_address(env, physical, prot, real_address, rw, access_type);
> }
> #if defined(TARGET_MIPS64)
> } else if (address < 0x4000000000000000ULL) {
> /* xuseg */
> if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
> - ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
> + ret = env->tlb->map_address(env, physical, prot, real_address, rw, access_type);
> } else {
> ret = TLBRET_BADADDR;
> }
> @@ -144,7 +163,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> /* xsseg */
> if ((supervisor_mode || kernel_mode) &&
> SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
> - ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
> + ret = env->tlb->map_address(env, physical, prot, real_address, rw, access_type);
> } else {
> ret = TLBRET_BADADDR;
> }
> @@ -161,7 +180,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> /* xkseg */
> if (kernel_mode && KX &&
> address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
> - ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
> + ret = env->tlb->map_address(env, physical, prot, real_address, rw, access_type);
> } else {
> ret = TLBRET_BADADDR;
> }
> @@ -185,7 +204,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> } else if (address < (int32_t)KSEG3_BASE) {
> /* sseg (kseg2) */
> if (supervisor_mode || kernel_mode) {
> - ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
> + ret = env->tlb->map_address(env, physical, prot, real_address, rw, access_type);
> } else {
> ret = TLBRET_BADADDR;
> }
> @@ -193,7 +212,7 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> /* kseg3 */
> /* XXX: debug segment is not emulated */
> if (kernel_mode) {
> - ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
> + ret = env->tlb->map_address(env, physical, prot, real_address, rw, access_type);
> } else {
> ret = TLBRET_BADADDR;
> }
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2013-12-21 15:34 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-16 14:12 [Qemu-devel] [PATCH v2 00/10] KVM Support for MIPS32 Processors James Hogan
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 01/10] hw/mips/cputimer: Don't start periodic timer in KVM mode James Hogan
2013-12-21 15:34 ` Aurelien Jarno
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 02/10] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA James Hogan
2013-12-21 15:34 ` Aurelien Jarno
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 03/10] target-mips: get_physical_address: Add defines for segment bases James Hogan
2013-12-21 15:34 ` Aurelien Jarno
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 04/10] target-mips: get_physical_address: Add KVM awareness James Hogan
2013-12-21 15:34 ` Aurelien Jarno [this message]
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 05/10] kvm: Set sigmask length to 16 for MIPS targets James Hogan
2013-12-21 15:34 ` Aurelien Jarno
2013-12-21 20:18 ` Peter Maydell
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 06/10] target-mips: Set target page size to 16K in KVM mode James Hogan
2013-12-21 15:34 ` Aurelien Jarno
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 07/10] target-mips: kvm: Add main KVM support for MIPS James Hogan
2013-12-21 15:35 ` Aurelien Jarno
2014-02-10 14:07 ` Andreas Färber
2014-02-11 10:54 ` James Hogan
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 08/10] hw/mips: In KVM mode, inject IRQ2 (I/O) interupts via ioctls James Hogan
2013-12-21 15:41 ` Aurelien Jarno
2013-12-21 20:40 ` Peter Maydell
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 09/10] hw/mips: malta: Add KVM support James Hogan
2013-12-21 15:37 ` Aurelien Jarno
2013-12-21 20:42 ` Peter Maydell
2014-02-12 15:07 ` James Hogan
2013-12-16 14:12 ` [Qemu-devel] [PATCH v2 10/10] target-mips: Enable KVM support in build system James Hogan
2013-12-21 15:38 ` Aurelien Jarno
2013-12-21 18:59 ` Peter Maydell
2013-12-23 12:31 ` James Hogan
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