From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41757) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuOgc-0000EH-8u for qemu-devel@nongnu.org; Sat, 21 Dec 2013 10:41:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VuOgY-0005Gj-0Y for qemu-devel@nongnu.org; Sat, 21 Dec 2013 10:41:54 -0500 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:46265) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VuOgX-0005Gb-Qe for qemu-devel@nongnu.org; Sat, 21 Dec 2013 10:41:49 -0500 Date: Sat, 21 Dec 2013 16:41:36 +0100 From: Aurelien Jarno Message-ID: <20131221154136.GA9375@ohm.rr44.fr> References: <1387203165-5553-1-git-send-email-james.hogan@imgtec.com> <1387203165-5553-9-git-send-email-james.hogan@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1387203165-5553-9-git-send-email-james.hogan@imgtec.com> Subject: Re: [Qemu-devel] [PATCH v2 08/10] hw/mips: In KVM mode, inject IRQ2 (I/O) interupts via ioctls List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: Paolo Bonzini , Gleb Natapov , qemu-devel@nongnu.org, kvm@vger.kernel.org, Sanjay Lal On Mon, Dec 16, 2013 at 02:12:43PM +0000, James Hogan wrote: > From: Sanjay Lal > > COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via > ioctls. > > Signed-off-by: Sanjay Lal > Signed-off-by: James Hogan > Cc: Aurelien Jarno > --- > Changes in v2: > - Expand commit message > - Remove #ifdef CONFIG_KVM since it's guarded by kvm_enabled() already > --- > hw/mips/mips_int.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c > index 7dbd24d..1b9981e 100644 > --- a/hw/mips/mips_int.c > +++ b/hw/mips/mips_int.c > @@ -23,6 +23,8 @@ > #include "hw/hw.h" > #include "hw/mips/cpudevs.h" > #include "cpu.h" > +#include "sysemu/kvm.h" > +#include "kvm_mips.h" > > static void cpu_mips_irq_request(void *opaque, int irq, int level) > { > @@ -35,8 +37,17 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) > > if (level) { > env->CP0_Cause |= 1 << (irq + CP0Ca_IP); > + > + if (kvm_enabled() && irq == 2) { > + kvm_mips_set_interrupt(env, irq, level); > + } > + > } else { > env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP)); > + > + if (kvm_enabled() && irq == 2) { > + kvm_mips_set_interrupt(env, irq, level); > + } > } > > if (env->CP0_Cause & CP0Ca_IP_mask) { Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net