From: "Michael S. Tsirkin" <mst@redhat.com>
To: Igor Mammedov <imammedo@redhat.com>
Cc: hutao@cn.fujitsu.com, mjt@tls.msk.ru, qemu-devel@nongnu.org,
chen.fan.fnst@cn.fujitsu.com, kraxel@redhat.com,
anthony.perard@citrix.com, lersek@redhat.com, afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCH 5/9] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources
Date: Wed, 8 Jan 2014 19:00:55 +0200 [thread overview]
Message-ID: <20140108170055.GB17404@redhat.com> (raw)
In-Reply-To: <1388269852-21198-6-git-send-email-imammedo@redhat.com>
On Sat, Dec 28, 2013 at 11:30:48PM +0100, Igor Mammedov wrote:
> .. so that they might not be used by PCI devices.
>
> Note:
> Resort to concatenating templates with preprocessor help,
> because 1.0b spec isn't supporting ConcatenateResTemplate,
> as result Windows XP fails to execute PCI0._CRS method if
> ConcatenateResTemplate() is used.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Interesting. Could be worth getting rid of ConcatenateResTemplate in other places
too so XP works on more systems ...
> ---
> Follow up patch will expose them as motherboard resources
> ---
> hw/i386/acpi-dsdt-pci-crs.dsl | 8 +-------
> hw/i386/acpi-dsdt.dsl | 29 +++++++++++++++++++++++++++++
> hw/i386/q35-acpi-dsdt.dsl | 8 ++++++++
> 3 files changed, 38 insertions(+), 7 deletions(-)
>
> diff --git a/hw/i386/acpi-dsdt-pci-crs.dsl b/hw/i386/acpi-dsdt-pci-crs.dsl
> index b375a19..8b631d1 100644
> --- a/hw/i386/acpi-dsdt-pci-crs.dsl
> +++ b/hw/i386/acpi-dsdt-pci-crs.dsl
> @@ -37,13 +37,7 @@ Scope(\_SB.PCI0) {
> 0x0000, // Address Translation Offset
> 0x0CF8, // Address Length
> ,, , TypeStatic)
> - WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
> - 0x0000, // Address Space Granularity
> - 0x0D00, // Address Range Minimum
> - 0xFFFF, // Address Range Maximum
> - 0x0000, // Address Translation Offset
> - 0xF300, // Address Length
> - ,, , TypeStatic)
> + BOARD_SPECIFIC_PCI_RESOURSES
> DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
> 0x00000000, // Address Space Granularity
> 0x000A0000, // Address Range Minimum
> diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
> index 3dc4789..55b4794 100644
> --- a/hw/i386/acpi-dsdt.dsl
> +++ b/hw/i386/acpi-dsdt.dsl
> @@ -35,6 +35,35 @@ DefinitionBlock (
> /****************************************************************
> * PCI Bus definition
> ****************************************************************/
> +#define BOARD_SPECIFIC_PCI_RESOURSES \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0x0D00, \
> + 0xADFF, \
> + 0x0000, \
> + 0xA100, \
> + ,, , TypeStatic) \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0xAE14, \
> + 0xAEFF, \
> + 0x0000, \
> + 0x00EC, \
> + ,, , TypeStatic) \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0xAF20, \
> + 0xAFDF, \
> + 0x0000, \
> + 0x00C0, \
> + ,, , TypeStatic) \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0xAFE4, \
> + 0xFFFF, \
> + 0x0000, \
> + 0x501C, \
> + ,, , TypeStatic)
>
> Scope(\_SB) {
> Device(PCI0) {
Could you add some comments here to document where
does each number comes from please?
E.g. /* PIIX4_PROC_BASE + 0x100 */ or something.
Ideally we'd generate this based on defines used
by host, but that does not have to block merging
this patch.
> diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
> index 9a43947..f3e5921 100644
> --- a/hw/i386/q35-acpi-dsdt.dsl
> +++ b/hw/i386/q35-acpi-dsdt.dsl
> @@ -48,6 +48,14 @@ DefinitionBlock (
> /****************************************************************
> * PCI Bus definition
> ****************************************************************/
> +#define BOARD_SPECIFIC_PCI_RESOURSES \
> + WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
> + 0x0000, \
> + 0x0D00, \
> + 0xFFFF, \
> + 0x0000, \
> + 0xF300, \
> + ,, , TypeStatic)
>
> Scope(\_SB) {
> Device(PCI0) {
> --
> 1.8.4.2
next prev parent reply other threads:[~2014-01-08 17:01 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-28 22:30 [Qemu-devel] [PATCH 0/9 v2] pc: CPU hotplug support for Q35 Igor Mammedov
2013-12-28 22:30 ` [Qemu-devel] [PATCH 1/9] acpi: factor out common cpu hotplug code for PIIX4/Q35 Igor Mammedov
2013-12-28 22:30 ` [Qemu-devel] [PATCH 2/9] acpi: ich9: add CPU hotplug handling to Q35 machine Igor Mammedov
2013-12-28 22:30 ` [Qemu-devel] [PATCH 3/9] pc: rebuild ACPI hex files if included *.dsl are touched Igor Mammedov
2014-01-08 17:47 ` Michael S. Tsirkin
2014-01-09 9:25 ` Igor Mammedov
2013-12-28 22:30 ` [Qemu-devel] [PATCH 4/9] pc: set PRST base in DSDT depending on chipset Igor Mammedov
2013-12-28 22:30 ` [Qemu-devel] [PATCH 5/9] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources Igor Mammedov
2014-01-08 17:00 ` Michael S. Tsirkin [this message]
2014-01-09 10:34 ` Igor Mammedov
2014-01-09 10:57 ` Michael S. Tsirkin
2013-12-28 22:30 ` [Qemu-devel] [PATCH 6/9] pc: Q35 DSDT: exclude CPU hotplug " Igor Mammedov
2013-12-28 22:30 ` [Qemu-devel] [PATCH 7/9] pc: ACPI: expose PRST IO range via _CRS Igor Mammedov
2014-01-08 16:50 ` Michael S. Tsirkin
2013-12-28 22:30 ` [Qemu-devel] [PATCH 8/9] pc: ACPI: unify source of CPU hotplug IO base/len Igor Mammedov
2014-01-08 17:06 ` Michael S. Tsirkin
2013-12-28 22:30 ` [Qemu-devel] [PATCH 9/9] pc: ACPI: update acpi-dsdt.hex.generated q35-acpi-dsdt.hex.generated Igor Mammedov
2014-01-08 17:47 ` [Qemu-devel] [PATCH 0/9 v2] pc: CPU hotplug support for Q35 Michael S. Tsirkin
-- strict thread matches above, loose matches on Subject: below --
2014-01-09 16:36 [Qemu-devel] [PATCH 0/9 v3] " Igor Mammedov
2014-01-09 16:36 ` [Qemu-devel] [PATCH 5/9] pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 IO range from PCI bus resources Igor Mammedov
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