* [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole @ 2013-11-27 11:57 Gerd Hoffmann 2013-11-27 12:40 ` Laszlo Ersek 2013-11-28 16:03 ` Laszlo Ersek 0 siblings, 2 replies; 7+ messages in thread From: Gerd Hoffmann @ 2013-11-27 11:57 UTC (permalink / raw) To: qemu-devel; +Cc: Laszlo Ersek, Gerd Hoffmann Make the 32bit pci hole start at end of ram, so all possible address space is covered. Of course the firmware can use less than that. Leaving space unused is no problem, mapping pci bars outside the hole causes problems though. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- hw/pci-host/piix.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index edc974e..8e41ac1 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, f->ram_memory = ram_memory; i440fx = I440FX_PCI_HOST_BRIDGE(dev); - /* Set PCI window size the way seabios has always done it. */ - /* Power of 2 so bios can cover it with a single MTRR */ - if (ram_size <= 0x80000000) { - i440fx->pci_info.w32.begin = 0x80000000; - } else if (ram_size <= 0xc0000000) { - i440fx->pci_info.w32.begin = 0xc0000000; - } else { - i440fx->pci_info.w32.begin = 0xe0000000; - } + i440fx->pci_info.w32.begin = pci_hole_start; memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, pci_hole_start, pci_hole_size); -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole 2013-11-27 11:57 [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole Gerd Hoffmann @ 2013-11-27 12:40 ` Laszlo Ersek 2013-12-10 4:57 ` Laszlo Ersek 2013-11-28 16:03 ` Laszlo Ersek 1 sibling, 1 reply; 7+ messages in thread From: Laszlo Ersek @ 2013-11-27 12:40 UTC (permalink / raw) To: Gerd Hoffmann; +Cc: qemu-devel On 11/27/13 12:57, Gerd Hoffmann wrote: > Make the 32bit pci hole start at end of ram, so all possible address > space is covered. Of course the firmware can use less than that. > Leaving space unused is no problem, mapping pci bars outside the > hole causes problems though. > > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> > --- > hw/pci-host/piix.c | 10 +--------- > 1 file changed, 1 insertion(+), 9 deletions(-) > > diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c > index edc974e..8e41ac1 100644 > --- a/hw/pci-host/piix.c > +++ b/hw/pci-host/piix.c > @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, > f->ram_memory = ram_memory; > > i440fx = I440FX_PCI_HOST_BRIDGE(dev); > - /* Set PCI window size the way seabios has always done it. */ > - /* Power of 2 so bios can cover it with a single MTRR */ > - if (ram_size <= 0x80000000) { > - i440fx->pci_info.w32.begin = 0x80000000; > - } else if (ram_size <= 0xc0000000) { > - i440fx->pci_info.w32.begin = 0xc0000000; > - } else { > - i440fx->pci_info.w32.begin = 0xe0000000; > - } > + i440fx->pci_info.w32.begin = pci_hole_start; > > memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, > pci_hole_start, pci_hole_size); > Reviewed-by: Laszlo Ersek <lersek@redhat.com> Thanks! Laszlo ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole 2013-11-27 12:40 ` Laszlo Ersek @ 2013-12-10 4:57 ` Laszlo Ersek 0 siblings, 0 replies; 7+ messages in thread From: Laszlo Ersek @ 2013-12-10 4:57 UTC (permalink / raw) To: qemu-devel; +Cc: Gerd Hoffmann On 11/27/13 13:40, Laszlo Ersek wrote: > On 11/27/13 12:57, Gerd Hoffmann wrote: >> Make the 32bit pci hole start at end of ram, so all possible address >> space is covered. Of course the firmware can use less than that. >> Leaving space unused is no problem, mapping pci bars outside the >> hole causes problems though. >> >> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> >> --- >> hw/pci-host/piix.c | 10 +--------- >> 1 file changed, 1 insertion(+), 9 deletions(-) >> >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c >> index edc974e..8e41ac1 100644 >> --- a/hw/pci-host/piix.c >> +++ b/hw/pci-host/piix.c >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, >> f->ram_memory = ram_memory; >> >> i440fx = I440FX_PCI_HOST_BRIDGE(dev); >> - /* Set PCI window size the way seabios has always done it. */ >> - /* Power of 2 so bios can cover it with a single MTRR */ >> - if (ram_size <= 0x80000000) { >> - i440fx->pci_info.w32.begin = 0x80000000; >> - } else if (ram_size <= 0xc0000000) { >> - i440fx->pci_info.w32.begin = 0xc0000000; >> - } else { >> - i440fx->pci_info.w32.begin = 0xe0000000; >> - } >> + i440fx->pci_info.w32.begin = pci_hole_start; >> >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, >> pci_hole_start, pci_hole_size); >> > > Reviewed-by: Laszlo Ersek <lersek@redhat.com> Can someone please pick this up? (I've also nominated it for 1.7.1.) Thanks, Laszlo ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole 2013-11-27 11:57 [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole Gerd Hoffmann 2013-11-27 12:40 ` Laszlo Ersek @ 2013-11-28 16:03 ` Laszlo Ersek 2014-01-10 20:28 ` Laszlo Ersek 1 sibling, 1 reply; 7+ messages in thread From: Laszlo Ersek @ 2013-11-28 16:03 UTC (permalink / raw) To: Michael Roth Cc: Jordan Justen (Intel address), qemu-stable, Gerd Hoffmann, qemu-devel Mike, On 11/27/13 12:57, Gerd Hoffmann wrote: > Make the 32bit pci hole start at end of ram, so all possible address > space is covered. Of course the firmware can use less than that. > Leaving space unused is no problem, mapping pci bars outside the > hole causes problems though. > > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> > --- > hw/pci-host/piix.c | 10 +--------- > 1 file changed, 1 insertion(+), 9 deletions(-) > > diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c > index edc974e..8e41ac1 100644 > --- a/hw/pci-host/piix.c > +++ b/hw/pci-host/piix.c > @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, > f->ram_memory = ram_memory; > > i440fx = I440FX_PCI_HOST_BRIDGE(dev); > - /* Set PCI window size the way seabios has always done it. */ > - /* Power of 2 so bios can cover it with a single MTRR */ > - if (ram_size <= 0x80000000) { > - i440fx->pci_info.w32.begin = 0x80000000; > - } else if (ram_size <= 0xc0000000) { > - i440fx->pci_info.w32.begin = 0xc0000000; > - } else { > - i440fx->pci_info.w32.begin = 0xe0000000; > - } > + i440fx->pci_info.w32.begin = pci_hole_start; > > memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, > pci_hole_start, pci_hole_size); > please pick this up for 1.7.1. 1.7.0 has been released without this patch, also without etc/pci-info, but with etc/acpi/tables. For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest RAM size of 2560MB, OVMF needs: - either this patch in qemu, or - etc/pci-info (which won't come back), or - a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe0000000 logic (which I won't add). Thanks Laszlo ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole 2013-11-28 16:03 ` Laszlo Ersek @ 2014-01-10 20:28 ` Laszlo Ersek 2014-01-12 6:50 ` Michael S. Tsirkin 0 siblings, 1 reply; 7+ messages in thread From: Laszlo Ersek @ 2014-01-10 20:28 UTC (permalink / raw) To: Michael Roth Cc: qemu-devel, Jordan Justen (Intel address), qemu-stable, Gerd Hoffmann On 11/28/13 17:03, Laszlo Ersek wrote: > Mike, > > On 11/27/13 12:57, Gerd Hoffmann wrote: >> Make the 32bit pci hole start at end of ram, so all possible address >> space is covered. Of course the firmware can use less than that. >> Leaving space unused is no problem, mapping pci bars outside the >> hole causes problems though. >> >> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> >> --- >> hw/pci-host/piix.c | 10 +--------- >> 1 file changed, 1 insertion(+), 9 deletions(-) >> >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c >> index edc974e..8e41ac1 100644 >> --- a/hw/pci-host/piix.c >> +++ b/hw/pci-host/piix.c >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, >> f->ram_memory = ram_memory; >> >> i440fx = I440FX_PCI_HOST_BRIDGE(dev); >> - /* Set PCI window size the way seabios has always done it. */ >> - /* Power of 2 so bios can cover it with a single MTRR */ >> - if (ram_size <= 0x80000000) { >> - i440fx->pci_info.w32.begin = 0x80000000; >> - } else if (ram_size <= 0xc0000000) { >> - i440fx->pci_info.w32.begin = 0xc0000000; >> - } else { >> - i440fx->pci_info.w32.begin = 0xe0000000; >> - } >> + i440fx->pci_info.w32.begin = pci_hole_start; >> >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, >> pci_hole_start, pci_hole_size); >> > > please pick this up for 1.7.1. > > 1.7.0 has been released without this patch, also without etc/pci-info, > but with etc/acpi/tables. > > For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest RAM > size of 2560MB, OVMF needs: > - either this patch in qemu, or > - etc/pci-info (which won't come back), or > - a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe0000000 > logic (which I won't add). Nominating this for v1.7.1 again. The qemu-2.0 version (ie. a forward-port) of this patch has been merged as ddaaefb piix: fix 32bit pci hole If necessary I can resubmit the v1.7.1 patch. Thanks, Laszlo ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole 2014-01-10 20:28 ` Laszlo Ersek @ 2014-01-12 6:50 ` Michael S. Tsirkin 2014-01-14 17:02 ` Michael Roth 0 siblings, 1 reply; 7+ messages in thread From: Michael S. Tsirkin @ 2014-01-12 6:50 UTC (permalink / raw) To: Laszlo Ersek Cc: Jordan Justen (Intel address), qemu-stable, Gerd Hoffmann, Michael Roth, qemu-devel On Fri, Jan 10, 2014 at 09:28:39PM +0100, Laszlo Ersek wrote: > On 11/28/13 17:03, Laszlo Ersek wrote: > > Mike, > > > > On 11/27/13 12:57, Gerd Hoffmann wrote: > >> Make the 32bit pci hole start at end of ram, so all possible address > >> space is covered. Of course the firmware can use less than that. > >> Leaving space unused is no problem, mapping pci bars outside the > >> hole causes problems though. > >> > >> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> > >> --- > >> hw/pci-host/piix.c | 10 +--------- > >> 1 file changed, 1 insertion(+), 9 deletions(-) > >> > >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c > >> index edc974e..8e41ac1 100644 > >> --- a/hw/pci-host/piix.c > >> +++ b/hw/pci-host/piix.c > >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, > >> f->ram_memory = ram_memory; > >> > >> i440fx = I440FX_PCI_HOST_BRIDGE(dev); > >> - /* Set PCI window size the way seabios has always done it. */ > >> - /* Power of 2 so bios can cover it with a single MTRR */ > >> - if (ram_size <= 0x80000000) { > >> - i440fx->pci_info.w32.begin = 0x80000000; > >> - } else if (ram_size <= 0xc0000000) { > >> - i440fx->pci_info.w32.begin = 0xc0000000; > >> - } else { > >> - i440fx->pci_info.w32.begin = 0xe0000000; > >> - } > >> + i440fx->pci_info.w32.begin = pci_hole_start; > >> > >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, > >> pci_hole_start, pci_hole_size); > >> > > > > please pick this up for 1.7.1. > > > > 1.7.0 has been released without this patch, also without etc/pci-info, > > but with etc/acpi/tables. > > > > For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest RAM > > size of 2560MB, OVMF needs: > > - either this patch in qemu, or > > - etc/pci-info (which won't come back), or > > - a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe0000000 > > logic (which I won't add). > > Nominating this for v1.7.1 again. > > The qemu-2.0 version (ie. a forward-port) of this patch has been merged as > > ddaaefb piix: fix 32bit pci hole > > If necessary I can resubmit the v1.7.1 patch. > > Thanks, > Laszlo It seems cleaner to backport this into stable. Mike, can you pick this up please? -- MST ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole 2014-01-12 6:50 ` Michael S. Tsirkin @ 2014-01-14 17:02 ` Michael Roth 0 siblings, 0 replies; 7+ messages in thread From: Michael Roth @ 2014-01-14 17:02 UTC (permalink / raw) To: Michael S. Tsirkin, Laszlo Ersek Cc: Jordan Justen (Intel address), Gerd Hoffmann, qemu-devel, qemu-stable Quoting Michael S. Tsirkin (2014-01-12 00:50:13) > On Fri, Jan 10, 2014 at 09:28:39PM +0100, Laszlo Ersek wrote: > > On 11/28/13 17:03, Laszlo Ersek wrote: > > > Mike, > > > > > > On 11/27/13 12:57, Gerd Hoffmann wrote: > > >> Make the 32bit pci hole start at end of ram, so all possible address > > >> space is covered. Of course the firmware can use less than that. > > >> Leaving space unused is no problem, mapping pci bars outside the > > >> hole causes problems though. > > >> > > >> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> > > >> --- > > >> hw/pci-host/piix.c | 10 +--------- > > >> 1 file changed, 1 insertion(+), 9 deletions(-) > > >> > > >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c > > >> index edc974e..8e41ac1 100644 > > >> --- a/hw/pci-host/piix.c > > >> +++ b/hw/pci-host/piix.c > > >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, > > >> f->ram_memory = ram_memory; > > >> > > >> i440fx = I440FX_PCI_HOST_BRIDGE(dev); > > >> - /* Set PCI window size the way seabios has always done it. */ > > >> - /* Power of 2 so bios can cover it with a single MTRR */ > > >> - if (ram_size <= 0x80000000) { > > >> - i440fx->pci_info.w32.begin = 0x80000000; > > >> - } else if (ram_size <= 0xc0000000) { > > >> - i440fx->pci_info.w32.begin = 0xc0000000; > > >> - } else { > > >> - i440fx->pci_info.w32.begin = 0xe0000000; > > >> - } > > >> + i440fx->pci_info.w32.begin = pci_hole_start; > > >> > > >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space, > > >> pci_hole_start, pci_hole_size); > > >> > > > > > > please pick this up for 1.7.1. > > > > > > 1.7.0 has been released without this patch, also without etc/pci-info, > > > but with etc/acpi/tables. > > > > > > For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest RAM > > > size of 2560MB, OVMF needs: > > > - either this patch in qemu, or > > > - etc/pci-info (which won't come back), or > > > - a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe0000000 > > > logic (which I won't add). > > > > Nominating this for v1.7.1 again. > > > > The qemu-2.0 version (ie. a forward-port) of this patch has been merged as > > > > ddaaefb piix: fix 32bit pci hole > > > > If necessary I can resubmit the v1.7.1 patch. > > > > Thanks, > > Laszlo > > > It seems cleaner to backport this into stable. > Mike, can you pick this up please? Sure, will queue this up for 1.7.1 and backport from upstream > > -- > MST ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2014-01-14 17:03 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-11-27 11:57 [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole Gerd Hoffmann 2013-11-27 12:40 ` Laszlo Ersek 2013-12-10 4:57 ` Laszlo Ersek 2013-11-28 16:03 ` Laszlo Ersek 2014-01-10 20:28 ` Laszlo Ersek 2014-01-12 6:50 ` Michael S. Tsirkin 2014-01-14 17:02 ` Michael Roth
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