From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59899) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W34ck-0006bW-Bp for qemu-devel@nongnu.org; Tue, 14 Jan 2014 09:05:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W34ce-0003Vq-Uc for qemu-devel@nongnu.org; Tue, 14 Jan 2014 09:05:46 -0500 Received: from mx1.redhat.com ([209.132.183.28]:21170) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W34ce-0003VN-39 for qemu-devel@nongnu.org; Tue, 14 Jan 2014 09:05:40 -0500 Date: Tue, 14 Jan 2014 16:05:30 +0200 From: "Michael S. Tsirkin" Message-ID: <20140114140530.GA28712@redhat.com> References: <1389288287.3209.231.camel@bling.home> <20140109180003.GA6819@redhat.com> <1389293278.3209.248.camel@bling.home> <1389294206.3209.249.camel@bling.home> <20140109215632.GB9385@redhat.com> <1389307342.3209.269.camel@bling.home> <20140110125504.GF10700@redhat.com> <1389367896.3209.291.camel@bling.home> <20140112075419.GB22644@redhat.com> <87ob3eaczl.fsf@pixel.localdomain> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87ob3eaczl.fsf@pixel.localdomain> Subject: Re: [Qemu-devel] [PULL 14/28] exec: make address spaces 64-bit wide List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mike Day Cc: peter.maydell@linaro.org, aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, Alex Williamson , Paolo Bonzini , Luiz Capitulino , david@gibson.dropbear.id.au On Tue, Jan 14, 2014 at 08:50:54AM -0500, Mike Day wrote: > > "Michael S. Tsirkin" writes: > > > On Fri, Jan 10, 2014 at 08:31:36AM -0700, Alex Williamson wrote: > > > Short term, just assume 48 bits on x86. > > > > We need to figure out what's the limitation on ppc and arm - > > maybe there's none and it can address full 64 bit range. > > > > Cc some people who might know about these platforms. > > The document you need is here: > > http://goo.gl/fJYxdN > > "PCI Bus Binding To: IEEE Std 1275-1994" > > The short answer is that Power (OpenFirmware-to-PCI) supports both MMIO > and Memory mappings for BARs. > > Also, both 32-bit and 64-bit BARs are required to be supported. It is > legal to construct a 64-bit BAR by masking all the high bits to > zero. Presumably it would be OK to mask the 16 high bits to zero as > well, constructing a 48-bit address. > > Mike > > -- > Mike Day | "Endurance is a Virtue" The question was whether addresses such as 0xfffffffffec00000 can be a valid BAR value on these platforms, whether it's accessible to the CPU and to other PCI devices. -- MST