From: Michael Roth <mdroth@linux.vnet.ibm.com>
To: "Michael S. Tsirkin" <mst@redhat.com>, Laszlo Ersek <lersek@redhat.com>
Cc: "Jordan Justen (Intel address)" <jordan.l.justen@intel.com>,
Gerd Hoffmann <kraxel@redhat.com>,
qemu-devel@nongnu.org, qemu-stable@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole
Date: Tue, 14 Jan 2014 11:02:11 -0600 [thread overview]
Message-ID: <20140114170211.21575.51878@loki> (raw)
In-Reply-To: <20140112065013.GA22640@redhat.com>
Quoting Michael S. Tsirkin (2014-01-12 00:50:13)
> On Fri, Jan 10, 2014 at 09:28:39PM +0100, Laszlo Ersek wrote:
> > On 11/28/13 17:03, Laszlo Ersek wrote:
> > > Mike,
> > >
> > > On 11/27/13 12:57, Gerd Hoffmann wrote:
> > >> Make the 32bit pci hole start at end of ram, so all possible address
> > >> space is covered. Of course the firmware can use less than that.
> > >> Leaving space unused is no problem, mapping pci bars outside the
> > >> hole causes problems though.
> > >>
> > >> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> > >> ---
> > >> hw/pci-host/piix.c | 10 +---------
> > >> 1 file changed, 1 insertion(+), 9 deletions(-)
> > >>
> > >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> > >> index edc974e..8e41ac1 100644
> > >> --- a/hw/pci-host/piix.c
> > >> +++ b/hw/pci-host/piix.c
> > >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
> > >> f->ram_memory = ram_memory;
> > >>
> > >> i440fx = I440FX_PCI_HOST_BRIDGE(dev);
> > >> - /* Set PCI window size the way seabios has always done it. */
> > >> - /* Power of 2 so bios can cover it with a single MTRR */
> > >> - if (ram_size <= 0x80000000) {
> > >> - i440fx->pci_info.w32.begin = 0x80000000;
> > >> - } else if (ram_size <= 0xc0000000) {
> > >> - i440fx->pci_info.w32.begin = 0xc0000000;
> > >> - } else {
> > >> - i440fx->pci_info.w32.begin = 0xe0000000;
> > >> - }
> > >> + i440fx->pci_info.w32.begin = pci_hole_start;
> > >>
> > >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f->pci_address_space,
> > >> pci_hole_start, pci_hole_size);
> > >>
> > >
> > > please pick this up for 1.7.1.
> > >
> > > 1.7.0 has been released without this patch, also without etc/pci-info,
> > > but with etc/acpi/tables.
> > >
> > > For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest RAM
> > > size of 2560MB, OVMF needs:
> > > - either this patch in qemu, or
> > > - etc/pci-info (which won't come back), or
> > > - a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe0000000
> > > logic (which I won't add).
> >
> > Nominating this for v1.7.1 again.
> >
> > The qemu-2.0 version (ie. a forward-port) of this patch has been merged as
> >
> > ddaaefb piix: fix 32bit pci hole
> >
> > If necessary I can resubmit the v1.7.1 patch.
> >
> > Thanks,
> > Laszlo
>
>
> It seems cleaner to backport this into stable.
> Mike, can you pick this up please?
Sure, will queue this up for 1.7.1 and backport from upstream
>
> --
> MST
prev parent reply other threads:[~2014-01-14 17:03 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-27 11:57 [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole Gerd Hoffmann
2013-11-27 12:40 ` Laszlo Ersek
2013-12-10 4:57 ` Laszlo Ersek
2013-11-28 16:03 ` Laszlo Ersek
2014-01-10 20:28 ` Laszlo Ersek
2014-01-12 6:50 ` Michael S. Tsirkin
2014-01-14 17:02 ` Michael Roth [this message]
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