From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45477) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W37OL-0001bw-Jl for qemu-devel@nongnu.org; Tue, 14 Jan 2014 12:03:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W37OC-0007Ar-M2 for qemu-devel@nongnu.org; Tue, 14 Jan 2014 12:03:05 -0500 Received: from e39.co.us.ibm.com ([32.97.110.160]:46937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W37OC-0006xU-GP for qemu-devel@nongnu.org; Tue, 14 Jan 2014 12:02:56 -0500 Received: from /spool/local by e39.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 14 Jan 2014 10:02:15 -0700 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Roth In-Reply-To: <20140112065013.GA22640@redhat.com> References: <1385553451-1352-1-git-send-email-kraxel@redhat.com> <5297695B.1010003@redhat.com> <52D057F7.1080709@redhat.com> <20140112065013.GA22640@redhat.com> Message-ID: <20140114170211.21575.51878@loki> Date: Tue, 14 Jan 2014 11:02:11 -0600 Subject: Re: [Qemu-devel] [PATCH v2] piix: fix 32bit pci hole List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" , Laszlo Ersek Cc: "Jordan Justen (Intel address)" , Gerd Hoffmann , qemu-devel@nongnu.org, qemu-stable@nongnu.org Quoting Michael S. Tsirkin (2014-01-12 00:50:13) > On Fri, Jan 10, 2014 at 09:28:39PM +0100, Laszlo Ersek wrote: > > On 11/28/13 17:03, Laszlo Ersek wrote: > > > Mike, > > > = > > > On 11/27/13 12:57, Gerd Hoffmann wrote: > > >> Make the 32bit pci hole start at end of ram, so all possible address > > >> space is covered. Of course the firmware can use less than that. > > >> Leaving space unused is no problem, mapping pci bars outside the > > >> hole causes problems though. > > >> > > >> Signed-off-by: Gerd Hoffmann > > >> --- > > >> hw/pci-host/piix.c | 10 +--------- > > >> 1 file changed, 1 insertion(+), 9 deletions(-) > > >> > > >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c > > >> index edc974e..8e41ac1 100644 > > >> --- a/hw/pci-host/piix.c > > >> +++ b/hw/pci-host/piix.c > > >> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_st= ate, > > >> f->ram_memory =3D ram_memory; > > >> = > > >> i440fx =3D I440FX_PCI_HOST_BRIDGE(dev); > > >> - /* Set PCI window size the way seabios has always done it. */ > > >> - /* Power of 2 so bios can cover it with a single MTRR */ > > >> - if (ram_size <=3D 0x80000000) { > > >> - i440fx->pci_info.w32.begin =3D 0x80000000; > > >> - } else if (ram_size <=3D 0xc0000000) { > > >> - i440fx->pci_info.w32.begin =3D 0xc0000000; > > >> - } else { > > >> - i440fx->pci_info.w32.begin =3D 0xe0000000; > > >> - } > > >> + i440fx->pci_info.w32.begin =3D pci_hole_start; > > >> = > > >> memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", f= ->pci_address_space, > > >> pci_hole_start, pci_hole_size); > > >> > > > = > > > please pick this up for 1.7.1. > > > = > > > 1.7.0 has been released without this patch, also without etc/pci-info, > > > but with etc/acpi/tables. > > > = > > > For OVMF to work with "etc/acpi/tables" correctly, with eg. a guest R= AM > > > size of 2560MB, OVMF needs: > > > - either this patch in qemu, or > > > - etc/pci-info (which won't come back), or > > > - a hack in OVMF that mimicks the same 0x80000000/0xc0000000/0xe00000= 00 > > > logic (which I won't add). > > = > > Nominating this for v1.7.1 again. > > = > > The qemu-2.0 version (ie. a forward-port) of this patch has been merged= as > > = > > ddaaefb piix: fix 32bit pci hole > > = > > If necessary I can resubmit the v1.7.1 patch. > > = > > Thanks, > > Laszlo > = > = > It seems cleaner to backport this into stable. > Mike, can you pick this up please? Sure, will queue this up for 1.7.1 and backport from upstream > = > -- = > MST