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Date: Sun, 2 Feb 2014 14:53:49 -0800
From: Christoffer Dall <christoffer.dall@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH v5 3/8] arm_gic: Fix GIC pending behavior
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Patch Tracking <patches@linaro.org>, QEMU Developers <qemu-devel@nongnu.org>, "kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>

On Fri, Jan 31, 2014 at 06:09:20PM +0000, Peter Maydell wrote:
> On 28 January 2014 20:32, Christoffer Dall <christoffer.dall@linaro.org> wrote:

[...]

> 
> This looks broadly right; a couple of comments below.
> 

[...]

> > +
> > +static void gic_set_irq_generic(GICState *s, int irq, int level,
> > +                                int cm, int target)
> > +{
> > +    if (level) {
> > +        GIC_SET_LEVEL(irq, cm);
> > +        DPRINTF("Set %d pending mask %x\n", irq, target);
> > +        if (GIC_TEST_EDGE_TRIGGER(irq)) {
> > +            GIC_SET_PENDING(irq, target);
> > +        }
> > +    } else {
> > +        if (GIC_TEST_EDGE_TRIGGER(irq)) {
> > +            GIC_CLEAR_PENDING(irq, target);
> > +        }
> 
> This doesn't look right. A falling edge for an edge triggered
> interrupt should just CLEAR_LEVEL and leave the state of the
> pending latch alone.
> 

duh, yeah, thanks for spotting.

[...]

Thanks,
-Christoffer