* [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9
@ 2014-02-03 21:23 Gabriel L. Somlo
2014-02-04 15:36 ` Michael S. Tsirkin
0 siblings, 1 reply; 3+ messages in thread
From: Gabriel L. Somlo @ 2014-02-03 21:23 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: agraf, qemu-devel
Michael,
Prior to commit 99fd437dee468609de8218f0eb3b16621fb6a9c9 (enable
hotplug for pci bridges), PCI cards used to show up in the "device
tree" of OS X (System Information). E.g., on MountainLion I have:
Hardware -> PCI Cards:
Card Type Driver Installed Slot
*ethernet Ethernet Controller Yes PCI Slot 2
pci8086,2934 USB UHC Yes PCI Slot 29
ethernet:
Type: Ethernet Controller
Driver Installed: Yes
MSI: No
Bus: PCI
Slot PCI Slot 2
Vendor ID: 0x8086
Device ID: 0x100e
Subsystem Vendor ID: 0x1af4
Subsystem ID: 0x1100
Revision ID: 0x0003
Hardware -> Ethernet Cards
ethernet:
Type: Ethernet Controller
Bus: PCI
Slot PCI Slot 2
Vendor ID: 0x8086
Device ID: 0x100e
Subsystem Vendor ID: 0x1af4
Subsystem ID: 0x1100
Revision ID: 0x0003
BSD name: en0
Kext name: AppleIntel8254XEthernet.kext
Location: /System/Library/Extensions/...
Version: 3.1.1b1
After commit 99fd437dee468609de8218f0eb3b16621fb6a9c9, I get:
Hardware -> PCI Cards:
This computer doesn't contain any PCI cards. If you installed PCI
cards, make sure they're properly installed.
Hardware -> Ethernet Cards
ethernet:
Type: Ethernet Controller
Bus: PCI
Vendor ID: 0x8086
Device ID: 0x100e
Subsystem Vendor ID: 0x1af4
Subsystem ID: 0x1100
Revision ID: 0x0003
BSD name: en0
Kext name: AppleIntel8254XEthernet.kext
Location: /System/Library/Extensions/...
Version: 3.1.1b1
Ethernet still works, but it's not showing up on the PCI bus, and it
no longer thinks it's plugged in to slot #2, as it used to before the
change.
My command line is
bin/qemu-system-x86_64 -enable-kvm -m 2048 -cpu core2duo -M q35 \
-device isa-applesmc,osk="..." \
-usb -device usb-kbd -device usb-mouse \
-smbios file=./dmidecode.bin -kernel ./chameleon_boot \
-device ide-drive,bus=ide.2,drive=MacHDD \
-drive id=MacHDD,if=none,snapshot=on,file=./mac_10.8.img \
where "dmidecode.bin" is a custom SMBIOS table, "chameleon_boot" is
the stage-2 bootloader component of Chameleon, and on the kernel side
I have the irq-polarity patch we're currently talking about in a
separate thread
(http://lists.nongnu.org/archive/html/qemu-devel/2014-01/msg04252.html)
and also the monitor==mwait==NOP patch.
Any ideas or thoughts appreciated !
Thanks much,
--Gabriel
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9 2014-02-03 21:23 [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9 Gabriel L. Somlo @ 2014-02-04 15:36 ` Michael S. Tsirkin 2014-02-04 17:53 ` Gabriel L. Somlo 0 siblings, 1 reply; 3+ messages in thread From: Michael S. Tsirkin @ 2014-02-04 15:36 UTC (permalink / raw) To: Gabriel L. Somlo; +Cc: agraf, qemu-devel On Mon, Feb 03, 2014 at 04:23:34PM -0500, Gabriel L. Somlo wrote: > Michael, > > Prior to commit 99fd437dee468609de8218f0eb3b16621fb6a9c9 (enable > hotplug for pci bridges), PCI cards used to show up in the "device > tree" of OS X (System Information). E.g., on MountainLion I have: > > > Hardware -> PCI Cards: > > Card Type Driver Installed Slot > *ethernet Ethernet Controller Yes PCI Slot 2 > pci8086,2934 USB UHC Yes PCI Slot 29 > > ethernet: > Type: Ethernet Controller > Driver Installed: Yes > MSI: No > Bus: PCI > Slot PCI Slot 2 > Vendor ID: 0x8086 > Device ID: 0x100e > Subsystem Vendor ID: 0x1af4 > Subsystem ID: 0x1100 > Revision ID: 0x0003 > > Hardware -> Ethernet Cards > > ethernet: > Type: Ethernet Controller > Bus: PCI > Slot PCI Slot 2 > Vendor ID: 0x8086 > Device ID: 0x100e > Subsystem Vendor ID: 0x1af4 > Subsystem ID: 0x1100 > Revision ID: 0x0003 > BSD name: en0 > Kext name: AppleIntel8254XEthernet.kext > Location: /System/Library/Extensions/... > Version: 3.1.1b1 > > > After commit 99fd437dee468609de8218f0eb3b16621fb6a9c9, I get: > > > Hardware -> PCI Cards: > > This computer doesn't contain any PCI cards. If you installed PCI > cards, make sure they're properly installed. > > Hardware -> Ethernet Cards > > ethernet: > Type: Ethernet Controller > Bus: PCI > Vendor ID: 0x8086 > Device ID: 0x100e > Subsystem Vendor ID: 0x1af4 > Subsystem ID: 0x1100 > Revision ID: 0x0003 > BSD name: en0 > Kext name: AppleIntel8254XEthernet.kext > Location: /System/Library/Extensions/... > Version: 3.1.1b1 > > > Ethernet still works, but it's not showing up on the PCI bus, and it > no longer thinks it's plugged in to slot #2, as it used to before the > change. > > My command line is > > bin/qemu-system-x86_64 -enable-kvm -m 2048 -cpu core2duo -M q35 \ > -device isa-applesmc,osk="..." \ > -usb -device usb-kbd -device usb-mouse \ > -smbios file=./dmidecode.bin -kernel ./chameleon_boot \ > -device ide-drive,bus=ide.2,drive=MacHDD \ > -drive id=MacHDD,if=none,snapshot=on,file=./mac_10.8.img \ > > where "dmidecode.bin" is a custom SMBIOS table, "chameleon_boot" is > the stage-2 bootloader component of Chameleon, and on the kernel side > I have the irq-polarity patch we're currently talking about in a > separate thread > (http://lists.nongnu.org/archive/html/qemu-devel/2014-01/msg04252.html) > and also the monitor==mwait==NOP patch. > > Any ideas or thoughts appreciated ! > > Thanks much, > --Gabriel Interesting. Possibly OSX wants an ACPI description of all slots even if they aren't hotpluggable? Could you try the following? (Note: compiled only, sorry - sick today). diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index bc46b58..6a65ed6 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -643,6 +643,13 @@ static inline char acpi_get_hex(uint32_t val) #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) +#define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1) +#define ACPI_PCINOHP_OFFSET_ID (*ssdt_pcinohp_id - *ssdt_pcinohp_start) +#define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start) +#define ACPI_PCINOHP_OFFSET_EJ0 (*ssdt_pcinohp_ej0 - *ssdt_pcinohp_start) +#define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start) +#define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start) + #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */ #define ACPI_SSDT_HEADER_LENGTH 36 @@ -677,6 +684,16 @@ static void patch_pcihp(int slot, uint8_t *ssdt_ptr) ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot; } +static void patch_pcinohp(int slot, uint8_t *ssdt_ptr) +{ + unsigned devfn = PCI_DEVFN(slot, 0); + + ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); + ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); + ssdt_ptr[ACPI_PCINOHP_OFFSET_ID] = slot; + ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot; +} + /* Assign BSEL property to all buses. In the future, this can be changed * to only assign to buses that support hotplug. */ @@ -737,6 +754,7 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state) AcpiBuildPciBusHotplugState *parent = child->parent; GArray *bus_table = build_alloc_array(); DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); + DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX); uint8_t op; int i; QObject *bsel; @@ -764,38 +782,49 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state) build_append_byte(bus_table, 0x08); /* NameOp */ build_append_nameseg(bus_table, "BSEL"); build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel))); + } - memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable); + memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable); + memset(slot_device_present, 0x00, sizeof slot_device_present); - for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) { - PCIDeviceClass *pc; - PCIDevice *pdev = bus->devices[i]; + for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) { + PCIDeviceClass *pc; + PCIDevice *pdev = bus->devices[i]; + int slot = PCI_SLOT(i); - if (!pdev) { - continue; - } + if (!pdev) { + continue; + } - pc = PCI_DEVICE_GET_CLASS(pdev); + set_bit(slot, slot_device_present); + pc = PCI_DEVICE_GET_CLASS(pdev); - if (pc->no_hotplug || pc->is_bridge) { - int slot = PCI_SLOT(i); + if (pc->no_hotplug || pc->is_bridge) { + int slot = PCI_SLOT(i); - clear_bit(slot, slot_hotplug_enable); - } + clear_bit(slot, slot_hotplug_enable); } + } - /* Append Device object for each slot which supports eject */ - for (i = 0; i < PCI_SLOT_MAX; i++) { - bool can_eject = test_bit(i, slot_hotplug_enable); - if (can_eject) { - void *pcihp = acpi_data_push(bus_table, - ACPI_PCIHP_SIZEOF); - memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); - patch_pcihp(i, pcihp); - bus_hotplug_support = true; - } + /* Append Device object for each slot which supports eject */ + for (i = 0; i < PCI_SLOT_MAX; i++) { + bool can_eject = test_bit(i, slot_hotplug_enable); + bool present = test_bit(i, slot_device_present); + if (can_eject) { + void *pcihp = acpi_data_push(bus_table, + ACPI_PCIHP_SIZEOF); + memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); + patch_pcihp(i, pcihp); + bus_hotplug_support = true; + } else if (present) { + void *pcihp = acpi_data_push(bus_table, + ACPI_PCINOHP_SIZEOF); + memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF); + patch_pcinohp(i, pcihp); } + } + if (bsel) { method = build_alloc_method("DVNT", 2); for (i = 0; i < PCI_SLOT_MAX; i++) { @@ -974,7 +1003,14 @@ build_ssdt(GArray *table_data, GArray *linker, { AcpiBuildPciBusHotplugState hotplug_state; - PCIBus *bus = find_i440fx(); /* TODO: Q35 support */ + Object *pci_host; + PCIBus *bus = NULL; + bool ambiguous; + + pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); + if (!ambiguous && pci_host) { + bus = PCI_HOST_BRIDGE(pci_host)->bus; + } build_pci_bus_state_init(&hotplug_state, NULL); diff --git a/hw/i386/ssdt-pcihp.dsl b/hw/i386/ssdt-pcihp.dsl index cc245c3..ea4b9e1 100644 --- a/hw/i386/ssdt-pcihp.dsl +++ b/hw/i386/ssdt-pcihp.dsl @@ -46,5 +46,17 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1) } } + ACPI_EXTRACT_DEVICE_START ssdt_pcinohp_start + ACPI_EXTRACT_DEVICE_END ssdt_pcinohp_end + ACPI_EXTRACT_DEVICE_STRING ssdt_pcinohp_name + + // Extract the offsets of the device name, address dword and the slot + // name byte - we fill them in for each device. + Device(SBB) { + ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcinohp_id + Name(_SUN, 0xAA) + ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcinohp_adr + Name(_ADR, 0xAA0000) + } } } ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9 2014-02-04 15:36 ` Michael S. Tsirkin @ 2014-02-04 17:53 ` Gabriel L. Somlo 0 siblings, 0 replies; 3+ messages in thread From: Gabriel L. Somlo @ 2014-02-04 17:53 UTC (permalink / raw) To: Michael S. Tsirkin; +Cc: agraf, qemu-devel On Tue, Feb 04, 2014 at 05:36:57PM +0200, Michael S. Tsirkin wrote: > Interesting. Possibly OSX wants an ACPI description of all slots > even if they aren't hotpluggable? > Could you try the following? (Note: compiled only, sorry - sick today). Yep, this patch fixes it for me, everything looks "normal" again :) Thanks, and hope you feel better soon ! --Gabriel > > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c > index bc46b58..6a65ed6 100644 > --- a/hw/i386/acpi-build.c > +++ b/hw/i386/acpi-build.c > @@ -643,6 +643,13 @@ static inline char acpi_get_hex(uint32_t val) > #define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start) > #define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start) > > +#define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1) > +#define ACPI_PCINOHP_OFFSET_ID (*ssdt_pcinohp_id - *ssdt_pcinohp_start) > +#define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start) > +#define ACPI_PCINOHP_OFFSET_EJ0 (*ssdt_pcinohp_ej0 - *ssdt_pcinohp_start) > +#define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start) > +#define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start) > + > #define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */ > #define ACPI_SSDT_HEADER_LENGTH 36 > > @@ -677,6 +684,16 @@ static void patch_pcihp(int slot, uint8_t *ssdt_ptr) > ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot; > } > > +static void patch_pcinohp(int slot, uint8_t *ssdt_ptr) > +{ > + unsigned devfn = PCI_DEVFN(slot, 0); > + > + ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4); > + ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn); > + ssdt_ptr[ACPI_PCINOHP_OFFSET_ID] = slot; > + ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot; > +} > + > /* Assign BSEL property to all buses. In the future, this can be changed > * to only assign to buses that support hotplug. > */ > @@ -737,6 +754,7 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state) > AcpiBuildPciBusHotplugState *parent = child->parent; > GArray *bus_table = build_alloc_array(); > DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX); > + DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX); > uint8_t op; > int i; > QObject *bsel; > @@ -764,38 +782,49 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state) > build_append_byte(bus_table, 0x08); /* NameOp */ > build_append_nameseg(bus_table, "BSEL"); > build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel))); > + } > > - memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable); > + memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable); > + memset(slot_device_present, 0x00, sizeof slot_device_present); > > - for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) { > - PCIDeviceClass *pc; > - PCIDevice *pdev = bus->devices[i]; > + for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) { > + PCIDeviceClass *pc; > + PCIDevice *pdev = bus->devices[i]; > + int slot = PCI_SLOT(i); > > - if (!pdev) { > - continue; > - } > + if (!pdev) { > + continue; > + } > > - pc = PCI_DEVICE_GET_CLASS(pdev); > + set_bit(slot, slot_device_present); > + pc = PCI_DEVICE_GET_CLASS(pdev); > > - if (pc->no_hotplug || pc->is_bridge) { > - int slot = PCI_SLOT(i); > + if (pc->no_hotplug || pc->is_bridge) { > + int slot = PCI_SLOT(i); > > - clear_bit(slot, slot_hotplug_enable); > - } > + clear_bit(slot, slot_hotplug_enable); > } > + } > > - /* Append Device object for each slot which supports eject */ > - for (i = 0; i < PCI_SLOT_MAX; i++) { > - bool can_eject = test_bit(i, slot_hotplug_enable); > - if (can_eject) { > - void *pcihp = acpi_data_push(bus_table, > - ACPI_PCIHP_SIZEOF); > - memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); > - patch_pcihp(i, pcihp); > - bus_hotplug_support = true; > - } > + /* Append Device object for each slot which supports eject */ > + for (i = 0; i < PCI_SLOT_MAX; i++) { > + bool can_eject = test_bit(i, slot_hotplug_enable); > + bool present = test_bit(i, slot_device_present); > + if (can_eject) { > + void *pcihp = acpi_data_push(bus_table, > + ACPI_PCIHP_SIZEOF); > + memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF); > + patch_pcihp(i, pcihp); > + bus_hotplug_support = true; > + } else if (present) { > + void *pcihp = acpi_data_push(bus_table, > + ACPI_PCINOHP_SIZEOF); > + memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF); > + patch_pcinohp(i, pcihp); > } > + } > > + if (bsel) { > method = build_alloc_method("DVNT", 2); > > for (i = 0; i < PCI_SLOT_MAX; i++) { > @@ -974,7 +1003,14 @@ build_ssdt(GArray *table_data, GArray *linker, > > { > AcpiBuildPciBusHotplugState hotplug_state; > - PCIBus *bus = find_i440fx(); /* TODO: Q35 support */ > + Object *pci_host; > + PCIBus *bus = NULL; > + bool ambiguous; > + > + pci_host = object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE, &ambiguous); > + if (!ambiguous && pci_host) { > + bus = PCI_HOST_BRIDGE(pci_host)->bus; > + } > > build_pci_bus_state_init(&hotplug_state, NULL); > > diff --git a/hw/i386/ssdt-pcihp.dsl b/hw/i386/ssdt-pcihp.dsl > index cc245c3..ea4b9e1 100644 > --- a/hw/i386/ssdt-pcihp.dsl > +++ b/hw/i386/ssdt-pcihp.dsl > @@ -46,5 +46,17 @@ DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1) > } > } > > + ACPI_EXTRACT_DEVICE_START ssdt_pcinohp_start > + ACPI_EXTRACT_DEVICE_END ssdt_pcinohp_end > + ACPI_EXTRACT_DEVICE_STRING ssdt_pcinohp_name > + > + // Extract the offsets of the device name, address dword and the slot > + // name byte - we fill them in for each device. > + Device(SBB) { > + ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcinohp_id > + Name(_SUN, 0xAA) > + ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcinohp_adr > + Name(_ADR, 0xAA0000) > + } > } > } ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2014-02-04 18:38 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-02-03 21:23 [Qemu-devel] osx pci vs. 99fd437dee468609de8218f0eb3b16621fb6a9c9 Gabriel L. Somlo 2014-02-04 15:36 ` Michael S. Tsirkin 2014-02-04 17:53 ` Gabriel L. Somlo
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