From: "Michael S. Tsirkin" <mst@redhat.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>,
qemu-devel@nongnu.org, anthony@codemonkey.ws
Subject: Re: [Qemu-devel] [RFC 0/9] generate dynamic _CRS for motherboard resources
Date: Mon, 17 Feb 2014 12:28:50 +0200 [thread overview]
Message-ID: <20140217102850.GA21925@redhat.com> (raw)
In-Reply-To: <1392625955.26953.12.camel@nilsson.home.kraxel.org>
On Mon, Feb 17, 2014 at 09:32:35AM +0100, Gerd Hoffmann wrote:
> On So, 2014-02-16 at 17:53 +0200, Michael S. Tsirkin wrote:
> > On Fri, Feb 07, 2014 at 01:51:27PM +0100, Igor Mammedov wrote:
> > > Since introduction of PCIHP, it became problematic to
> > > punch hole in PCI0._CRS statically since PCI hotplug
> > > region size became runtime changeable.
> >
> > What makes it runtime changeable?
>
> machine type. q35 / piix map them at different locations.
That's not dynamic. We can load the correct ones per DSDT.
> Also we might want to this also for devices which are
> runtime-configurable (isa-debugcon, pvpanic, ...).
That's more convincing, but I don't want
knowledge of all these devices in acpi-build.
Also we need to make seabios avoid these ranges
when enumerating devices.
How does it know to avoid them ATM?
>
> cheers,
> Gerd
>
next prev parent reply other threads:[~2014-02-17 10:24 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-07 12:51 [Qemu-devel] [RFC 0/9] generate dynamic _CRS for motherboard resources Igor Mammedov
2014-02-07 12:51 ` [Qemu-devel] [RFC 1/9] Revert "pc: Q35 DSDT: exclude CPU hotplug IO range from PCI bus resources" Igor Mammedov
2014-02-07 12:51 ` [Qemu-devel] [RFC 2/9] Revert "pc: PIIX DSDT: exclude CPU/PCI hotplug & GPE0 " Igor Mammedov
2014-02-07 12:51 ` [Qemu-devel] [RFC 3/9] Partial revert "pc: ACPI: expose PRST IO range via _CRS" Igor Mammedov
2014-02-07 12:51 ` [Qemu-devel] [RFC 4/9] acpi: replace opencoded opcodes with defines Igor Mammedov
2014-02-16 12:02 ` Michael S. Tsirkin
2014-02-07 12:51 ` [Qemu-devel] [RFC 5/9] acpi: add PNP0C02 to PCI0 bus Igor Mammedov
2014-02-16 12:06 ` Michael S. Tsirkin
2014-02-07 12:51 ` [Qemu-devel] [RFC 6/9] acpi: consume GPE0 IO resources in PNP0C02 device Igor Mammedov
2014-02-16 15:20 ` Michael S. Tsirkin
2014-02-07 12:51 ` [Qemu-devel] [RFC 7/9] acpi: consume CPU hotplug IO resource " Igor Mammedov
2014-02-16 15:39 ` Michael S. Tsirkin
2014-02-07 12:51 ` [Qemu-devel] [RFC 8/9] pcihp: expose PCI hotplug MMIO base/length as properties of piix4pm Igor Mammedov
2014-02-16 15:45 ` Michael S. Tsirkin
2014-02-07 12:51 ` [Qemu-devel] [RFC 9/9] acpi: consume PCIHP IO resource in PNP0C02 device Igor Mammedov
2014-02-16 15:53 ` [Qemu-devel] [RFC 0/9] generate dynamic _CRS for motherboard resources Michael S. Tsirkin
2014-02-17 8:32 ` Gerd Hoffmann
2014-02-17 10:28 ` Michael S. Tsirkin [this message]
2014-02-17 10:46 ` Gerd Hoffmann
2014-02-17 11:05 ` Michael S. Tsirkin
2014-02-18 16:36 ` Igor Mammedov
2014-02-18 22:04 ` Laszlo Ersek
2014-02-19 8:59 ` Igor Mammedov
2014-02-17 10:33 ` Igor Mammedov
2014-02-17 11:02 ` Michael S. Tsirkin
2014-02-18 11:10 ` Igor Mammedov
2014-02-18 11:33 ` Michael S. Tsirkin
2014-02-18 16:30 ` Igor Mammedov
2014-02-17 8:29 ` Gerd Hoffmann
2014-02-18 16:48 ` Igor Mammedov
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