From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49204) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFLwC-0002Oj-R4 for qemu-devel@nongnu.org; Mon, 17 Feb 2014 06:00:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WFLw6-0000xu-CA for qemu-devel@nongnu.org; Mon, 17 Feb 2014 06:00:36 -0500 Received: from mx1.redhat.com ([209.132.183.28]:51610) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WFLw5-0000xm-PU for qemu-devel@nongnu.org; Mon, 17 Feb 2014 06:00:30 -0500 Date: Mon, 17 Feb 2014 13:05:12 +0200 From: "Michael S. Tsirkin" Message-ID: <20140217110512.GC21925@redhat.com> References: <1391777496-3882-1-git-send-email-imammedo@redhat.com> <20140216155345.GH30056@redhat.com> <1392625955.26953.12.camel@nilsson.home.kraxel.org> <20140217102850.GA21925@redhat.com> <1392633973.26953.26.camel@nilsson.home.kraxel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1392633973.26953.26.camel@nilsson.home.kraxel.org> Subject: Re: [Qemu-devel] [RFC 0/9] generate dynamic _CRS for motherboard resources List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: Igor Mammedov , qemu-devel@nongnu.org, anthony@codemonkey.ws On Mon, Feb 17, 2014 at 11:46:13AM +0100, Gerd Hoffmann wrote: > On Mo, 2014-02-17 at 12:28 +0200, Michael S. Tsirkin wrote: > > On Mon, Feb 17, 2014 at 09:32:35AM +0100, Gerd Hoffmann wrote: > > > On So, 2014-02-16 at 17:53 +0200, Michael S. Tsirkin wrote: > > > > On Fri, Feb 07, 2014 at 01:51:27PM +0100, Igor Mammedov wrote: > > > > > Since introduction of PCIHP, it became problematic to > > > > > punch hole in PCI0._CRS statically since PCI hotplug > > > > > region size became runtime changeable. > > > > > > > > What makes it runtime changeable? > > > > > > machine type. q35 / piix map them at different locations. > > > > That's not dynamic. We can load the correct ones per DSDT. > > > > > Also we might want to this also for devices which are > > > runtime-configurable (isa-debugcon, pvpanic, ...). > > > > That's more convincing, but I don't want > > knowledge of all these devices in acpi-build. > > Also we need to make seabios avoid these ranges > > when enumerating devices. > > How does it know to avoid them ATM? > > seabios maps io ports @ 0xc000 up. > recently it has changed to use 0x1000 -> 0xa000 region > in case the hole above 0xc000 is too small. > > In other words: It doesn't map anything below 0x1000 and it avoids > 0xa000 -> 0xbfff. Hardcoded. I want lift the later restriction on q35, > by moving pmbase (0xb000 atm) out of the way, so seabios can use the > whole 0x1000 -> 0xffff range, but that is still wip. > > cheers, > Gerd > okay so we'll want some fwcfg for that correct? whatever fills that, can share logic with acpi generation :) That might or might not make it dynamic enough to make it worth bothering - alternative is just two version of acpi depending on machine type. -- MST