From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56135) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WGoMc-0001WZ-F4 for qemu-devel@nongnu.org; Fri, 21 Feb 2014 06:34:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WGoMT-0002hY-2d for qemu-devel@nongnu.org; Fri, 21 Feb 2014 06:33:54 -0500 Received: from e06smtp10.uk.ibm.com ([195.75.94.106]:52155) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WGoMS-0002h9-MP for qemu-devel@nongnu.org; Fri, 21 Feb 2014 06:33:44 -0500 Received: from /spool/local by e06smtp10.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 21 Feb 2014 11:33:43 -0000 Date: Fri, 21 Feb 2014 12:33:37 +0100 From: Greg Kurz Message-ID: <20140221123337.1aff2b67@bahia.local> In-Reply-To: <20140221092906.5990.1984.stgit@nimbus> References: <20140221092906.5990.1984.stgit@nimbus> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH] target-ppc: Introduce hypervisor call H_GET_TCE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Dufour Cc: qemu-ppc@nongnu.org, Alexander Graf , qemu-devel@nongnu.org On Fri, 21 Feb 2014 10:29:06 +0100 Laurent Dufour wrote: > This patch introduces the hypervisor call H_GET_TCE which is basically the > reverse of H_PUT_TCE, as defined in the Power Architecture Platform > Requirements (PAPR). > > The hcall H_GET_TCE is required by the kdump kernel which is calling it to > retrieve the TCE set up by the panicing kernel. > > Signed-off-by: Laurent Dufour > --- FWIW, you can add this :) Reviewed-by: Greg Kurz > hw/ppc/spapr_iommu.c | 37 +++++++++++++++++++++++++++++++++++++ > trace-events | 1 + > 2 files changed, 38 insertions(+) > > diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c > index ef45f4f..d9fe946 100644 > --- a/hw/ppc/spapr_iommu.c > +++ b/hw/ppc/spapr_iommu.c > @@ -243,6 +243,42 @@ static target_ulong h_put_tce(PowerPCCPU *cpu, > sPAPREnvironment *spapr, return ret; > } > > +static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba, > + target_ulong *tce) > +{ > + if (ioba >= tcet->window_size) { > + hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x" > + TARGET_FMT_lx "\n", ioba); > + return H_PARAMETER; > + } > + > + *tce = tcet->table[ioba >> SPAPR_TCE_PAGE_SHIFT]; > + > + return H_SUCCESS; > +} > + > +static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr, > + target_ulong opcode, target_ulong *args) > +{ > + target_ulong liobn = args[0]; > + target_ulong ioba = args[1]; > + target_ulong tce = 0; > + target_ulong ret = H_PARAMETER; > + sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); > + > + ioba &= ~(SPAPR_TCE_PAGE_SIZE - 1); > + > + if (tcet) { > + ret = get_tce_emu(tcet, ioba, &tce); > + if (!ret) { > + args[0] = tce; > + } > + } > + trace_spapr_iommu_get(liobn, ioba, ret, tce); > + > + return ret; > +} > + > int spapr_dma_dt(void *fdt, int node_off, const char *propname, > uint32_t liobn, uint64_t window, uint32_t size) > { > @@ -295,6 +331,7 @@ static void spapr_tce_table_class_init(ObjectClass > *klass, void *data) > > /* hcall-tce */ > spapr_register_hypercall(H_PUT_TCE, h_put_tce); > + spapr_register_hypercall(H_GET_TCE, h_get_tce); > } > > static TypeInfo spapr_tce_table_info = { > diff --git a/trace-events b/trace-events > index 0b3c1ac..5b306a0 100644 > --- a/trace-events > +++ b/trace-events > @@ -1136,6 +1136,7 @@ xics_ics_eoi(int nr) "ics_eoi: irq %#x" > > # hw/ppc/spapr_iommu.c > spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t > ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 > +spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t > tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 > spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned > perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" > perm=%u mask=%x" spapr_iommu_new_table(uint64_t liobn, void *tcet, void > *table, int fd) "liobn=%"PRIx64" tcet=%p table=%p fd=%d" > > > -- Gregory Kurz kurzgreg@fr.ibm.com gkurz@linux.vnet.ibm.com Software Engineer @ IBM/Meiosys http://www.ibm.com Tel +33 (0)562 165 496 "Anarchy is about taking complete responsibility for yourself." Alan Moore.