From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58357) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPgKo-000705-8Z for qemu-devel@nongnu.org; Mon, 17 Mar 2014 18:48:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WPgKi-0001kY-DR for qemu-devel@nongnu.org; Mon, 17 Mar 2014 18:48:42 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:33806) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WPgKi-0001iu-7t for qemu-devel@nongnu.org; Mon, 17 Mar 2014 18:48:36 -0400 Received: by mail-pb0-f45.google.com with SMTP id uo5so6327039pbc.18 for ; Mon, 17 Mar 2014 15:48:34 -0700 (PDT) Date: Mon, 17 Mar 2014 15:48:40 -0700 From: Christoffer Dall Message-ID: <20140317224840.GB3692@cbox> References: <1393483868-6151-1-git-send-email-pranavkumar@linaro.org> <1393483868-6151-6-git-send-email-pranavkumar@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [RFC PATCH 5/7] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Anup Patel , patches@apm.com, Alexander Graf , qemu-devel , "kvmarm@lists.cs.columbia.edu" , Pranavkumar Sawargaonkar On Mon, Mar 17, 2014 at 07:35:43PM +0000, Peter Maydell wrote: > [another resend for qemu-devel...] > > On 27 February 2014 07:16, Pranavkumar Sawargaonkar > wrote: > > On 27 February 2014 12:21, Pranavkumar Sawargaonkar > > wrote: > >> Latest linux kernel supports in-kernel emulation of PSCI v0.2 but > >> to enable it we need to select KVM_ARM_VCPU_PSCI_0_2 feature using > >> KVM_ARM_VCPU_INIT ioctl. > >> > >> Also, we can use KVM_ARM_VCPU_PSCI_0_2 feature for VCPU only when > >> linux kernel has KVM_CAP_ARM_PSCI_0_2 capability. > >> > >> This patch updates kvm_arch_init_vcpu() to enable KVM_ARM_VCPU_PSCI_0_2 > >> feature for VCPU when KVM ARM/ARM64 has KVM_CAP_ARM_PSCI_0_2 capability. > > I think this has implications for migration. What happens > if you migrate a VM from a host system where the host > kernel supports this capability to one where it doesn't? > (Presumably the answer is "it won't work" and we need > to ensure we don't allow that.) > Conversely, is it OK to migrate a guest from a host > which didn't support PSCI 0.2 to one which does? Does > that work even if the destination has PSCI 0.2 enabled > for the vCPUs, or do we need to support starting a > VM with 0.2 disabled even on 0.2-capable hosts, for > use as a migration target? The init feature should be a switch, turn 0.2 on or off, if off, we're emulating 0.1. If 0.2 is on, 0.1 call numbers should generate errors. You're right, we need to fix this for migration. > > Also we still don't seem to have done anything about > migration of the PSCI CPU powerup/down state. > We need to create a card for this in Linaro. Thought I would deal with it when working through migration for ARMv8. Thanks! -Christoffer