From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54556) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQ3g0-0001SZ-Lk for qemu-devel@nongnu.org; Tue, 18 Mar 2014 19:44:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WQ3fr-0006mB-MK for qemu-devel@nongnu.org; Tue, 18 Mar 2014 19:44:08 -0400 Received: from mout.gmx.net ([212.227.17.21]:65124) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WQ3fr-0006m3-B3 for qemu-devel@nongnu.org; Tue, 18 Mar 2014 19:43:59 -0400 Received: from mailout-eu.gmx.com ([10.1.101.216]) by mrigmx.server.lan (mrigmx002) with ESMTP (Nemesis) id 0M3PbS-1XGeKL3O1w-00r2NW for ; Wed, 19 Mar 2014 00:43:57 +0100 Content-Type: text/plain; charset="utf-8" Date: Wed, 19 Mar 2014 00:43:57 +0100 From: "Olivier DANET" Message-ID: <20140318234357.21950@gmx.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] Re : Re: [PATCH] sparc32 : Signed integer division overflow List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland Cc: Blue Swirl , Peter Maydell , qemu-devel > ----- Message d'origine ----- > De : Mark Cave-Ayland > Envoyés : 18.03.14 01:20 > À : Olivier Danet > Objet : Re: [Qemu-devel] [PATCH] sparc32 : Signed integer division overflow > > On 12/03/14 21:26, Olivier Danet wrote: > > Hi Olivier, > > > Here is a patch for handling this corner case on SPARC32. > > SPARC64 division already checks this in helper_sdivx(), some other > > architectures > > seem to do the same (for example, target-arm/helper.c: HELPER(sdiv)) > > > > =================================================================== > > The integer division 0x8000_0000_0000_0000 / -1 must be handled separately > > to avoid overflows on the QEMU host. > > > > Signed-off-by: Olivier Danet > > > > ------------------------------------------------------------------- > > diff --git a/target-sparc/helper.c b/target-sparc/helper.c > > index 57c20af..b6b5937 100644 > > --- a/target-sparc/helper.c > > +++ b/target-sparc/helper.c > > @@ -116,14 +116,16 @@ static target_ulong > > helper_sdiv_common(CPUSPARCState *env, target_ulong a, > > if (x1 == 0) { > > cpu_restore_state(env, GETPC()); > > helper_raise_exception(env, TT_DIV_ZERO); > > - } > > - > > - x0 = x0 / x1; > > - if ((int32_t) x0 != x0) { > > - x0 = x0 < 0 ? 0x80000000 : 0x7fffffff; > > + } else if (x1 == -1 && x0 == 0x8000000000000000) { > > + x0 = 0x7fffffff; > > overflow = 1; > > Thanks for the patch! I think based upon Peter's recent series that the > sign constant would need a ULL suffix in order to function correctly on > 32-bit platforms. > > My personal preference would be for (1ULL << 63) unless Peter (CC added) > can think of a reason to leave the hex constant in its current form? > > That said, I've tested the patch on a Debian etch Linux image and it > works for me. > The constant lacks an "ULL" indeed, sorry. There are both (1ULL << 63) and 0x8000000000000000[ULL] constants in QEMU code, and not a single 9223372036854775808ULL... At least, with (1ULL << 63), we are not tempted to count the zeros. Regards Olivier.