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Date: Tue, 1 Apr 2014 18:44:04 +0100
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Message-ID: <20140401174404.GU2411@work-vm>
References: <1396371187-8567-1-git-send-email-peter.maydell@linaro.org>
	<1396371187-8567-5-git-send-email-peter.maydell@linaro.org>
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In-Reply-To: <1396371187-8567-5-git-send-email-peter.maydell@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 4/5] hw/net/stellaris_enet: Correctly
 implement the TR and THR registers
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: patches@linaro.org, qemu-devel@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>

* Peter Maydell (peter.maydell@linaro.org) wrote:

<snip>

> @@ -338,9 +347,11 @@ static void stellaris_enet_write(void *opaque, hwaddr offset,
>      case 0x2c: /* MTXD */
>          s->mtxd = value & 0xff;
>          break;
> +    case 0x38: /* TR */
> +        stellaris_enet_send(s);
> +        break;

Shouldn't that be something like:

   if (value & 1) {
       stellaris_enet_send(s);
   }

Dave
>      case 0x30: /* MRXD */
>      case 0x34: /* NP */
> -    case 0x38: /* TR */
>          /* Ignored.  */
>      case 0x3c: /* Undocuented: Timestamp? */
>          /* Ignored.  */
> -- 
> 1.9.0
> 
> 
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK