From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v1 2/4] target-arm: A64: Handle blr lr
Date: Thu, 1 May 2014 21:43:03 +1000 [thread overview]
Message-ID: <20140501114303.GA18802@zapo.iiNet> (raw)
In-Reply-To: <CAFEAcA8Xi35kZkE33RVKZ8vTF6UKBLaCNvULh8b+=O5Pj8hd_w@mail.gmail.com>
On Thu, May 01, 2014 at 10:31:06AM +0100, Peter Maydell wrote:
> On 1 May 2014 10:02, Alex Bennée <alex.bennee@linaro.org> wrote:
> >
> > Edgar E. Iglesias <edgar.iglesias@gmail.com> writes:
> >
> >> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >>
> >> For linked branches, updates to the link register happen
> >> conceptually after the read of the branch target register.
> >>
> >> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> >
> > I'm trying to think of a case where this could actually cause a problem
> > but I can't. However from a clarity/correctness point of view it's
> > better.
>
> Well, we actually misexecute "BLR LR" otherwise, right?
> That's probably not very common but there's no reason it
> might not occur (eg call to a function pointer from a
> function where LR has been saved on entry and is free
> for use as a generic tempreg).
Right. For example, the kernel/kvm actually does this in
arch/arm64/kvm/hyp.S:773: blr lr
Thanks,
Edgar
next prev parent reply other threads:[~2014-05-01 11:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-01 6:34 [Qemu-devel] [PATCH v1 0/4] Mixed ARM A64 fixes Edgar E. Iglesias
2014-05-01 6:34 ` [Qemu-devel] [PATCH v1 1/4] target-arm: Make vbar_write 64bit friendly on 32bit hosts Edgar E. Iglesias
2014-05-01 9:04 ` [Qemu-devel] [PATCH v1 1/4] target-arm: Make vbar_write 64bitfriendly on 32bit hostss Alex Bennée
2014-05-01 12:55 ` [Qemu-devel] [PATCH v1 1/4] target-arm: Make vbar_write 64bit friendly on 32bit hosts Peter Crosthwaite
2014-05-01 6:34 ` [Qemu-devel] [PATCH v1 2/4] target-arm: A64: Handle blr lr Edgar E. Iglesias
2014-05-01 9:02 ` Alex Bennée
2014-05-01 9:31 ` Peter Maydell
2014-05-01 11:43 ` Edgar E. Iglesias [this message]
2014-05-01 13:55 ` Alex Bennée
2014-05-01 6:34 ` [Qemu-devel] [PATCH v1 3/4] target-arm: A64: Fix a typo when declaring TLBI ops Edgar E. Iglesias
2014-05-01 8:59 ` [Qemu-devel] [PATCH v1 3/4] target-arm: A64: Fix a typo whendeclaring TLBI opss Alex Bennée
2014-05-01 6:34 ` [Qemu-devel] [PATCH v1 4/4] target-arm: Correct a comment refering to EL0 Edgar E. Iglesias
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