[Qemu-devel] E1000 emulation in qemu and pci configuration space

[Qemu-devel] E1000 emulation in qemu and pci configuration space

[Ayaz Akram]

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Does e1000's emulation in QEMU require that the guest set its base address
register(pci configuration space register) or qemu has default value for
its base address register?

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Re: [Qemu-devel] E1000 emulation in qemu and pci configuration space

[Stefan Hajnoczi]

On Mon, May 05, 2014 at 02:15:05PM +0500, Ayaz Akram wrote:
> Does e1000's emulation in QEMU require that the guest set its base address
> register(pci configuration space register) or qemu has default value for
> its base address register?

There is no default.

Drivers for some operating systems (Mac OS X?) may assume the device
state set up by the firmware (UEFI).  It's nasty to do that but it
happens.  Since QEMU's firmware is different from that on real machines
a hack may be necessary to make the guest OS driver work.  That hack
shouldn't be in QEMU's device emulation code though - putting it into
the guest firmware is closest to how the physical machine works.

Stefan

Re: [Qemu-devel] E1000 emulation in qemu and pci configuration space

[Stefan Hajnoczi]

On Wed, May 7, 2014 at 3:08 PM, Ayaz Akram <aaqemu@gmail.com> wrote:
> So, if I have rightly understood, this means whatever address range guest
> wants to use, guest should write base address registers for particular
> device accordingly.

Yes.

> Actually, I have made a hack
[...]
> wrote bar0 in emulated e1000's config space, but I am not able to understand
> from e1000's code in qemu, that how does qemu get to know that this is going
> to be the base adress for this device.

Linux PCI drivers usually do not write a BAR address themselves.

A key feature of PCI is autoconfiguration.  That means the firmware or
operating system can scan all PCI adapters and query how much BAR
space they need.  Then the firmware or operation system sets the BAR
addresses to make the devices available.  The actual device driver
doesn't decide the specific BAR address, it usually just asks the
kernel PCI layer to "map" a BAR that it wants to use.

If you need more info, please see https://lwn.net/Kernel/LDD3/ and the
PCI specification.

Stefan