From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Rob Herring" <rob.herring@linaro.org>,
"Fabian Aggeler" <aggelerf@ethz.ch>,
"Alexander Graf" <agraf@suse.de>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"John Williams" <john.williams@xilinx.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v3 19/22] target-arm: A64: Register VBAR_EL2
Date: Wed, 21 May 2014 01:01:28 +0000 [thread overview]
Message-ID: <20140521010128.GB30982@hostname> (raw)
In-Reply-To: <CAEgOgz74r=RV2UWybqDOCRvD-9ZQ+YxFso-XJeC3G1O3htDuRw@mail.gmail.com>
On Tue, May 20, 2014 at 07:02:37PM +1000, Peter Crosthwaite wrote:
> On Mon, May 19, 2014 at 7:23 PM, Edgar E. Iglesias
> <edgar.iglesias@gmail.com> wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> > target-arm/cpu.h | 2 +-
> > target-arm/helper.c | 20 ++++++++++++++++++++
> > 2 files changed, 21 insertions(+), 1 deletion(-)
> >
> > diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> > index 7322e03..693ad0f 100644
> > --- a/target-arm/cpu.h
> > +++ b/target-arm/cpu.h
> > @@ -198,7 +198,7 @@ typedef struct CPUARMState {
> > uint32_t c9_pmuserenr; /* perf monitor user enable */
> > uint32_t c9_pminten; /* perf monitor interrupt enables */
> > uint64_t mair_el1;
> > - uint64_t vbar_el[2]; /* vector base address register */
> > + uint64_t vbar_el[3]; /* vector base address register */
> > uint32_t c13_fcse; /* FCSE PID. */
> > uint64_t contextidr_el1; /* Context ID. */
> > uint64_t tpidr_el0; /* User RW Thread register. */
> > diff --git a/target-arm/helper.c b/target-arm/helper.c
> > index 5a2073e..7ca63a8 100644
> > --- a/target-arm/helper.c
> > +++ b/target-arm/helper.c
> > @@ -2077,6 +2077,15 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
> > REGINFO_SENTINEL
> > };
> >
> > +/* Used to describe the behaviour of EL2 regs when EL2 does not exist. */
> > +static const ARMCPRegInfo v8_no_el2_cp_reginfo[] = {
>
> Should it be v8_el3_no_el2_cp_reginfo?
I've changed it to v8_el3_no_el2_cp_reginfo.
Thanks,
Edgar
>
> Otherwise,
>
> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
next prev parent reply other threads:[~2014-05-21 1:01 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-19 9:22 [Qemu-devel] [PATCH v3 00/22] target-arm: Preparations for A64 EL2 and 3 Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 01/22] target-arm: Make elr_el1 an array Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 02/22] target-arm: Make esr_el1 " Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 03/22] target-arm: c12_vbar -> vbar_el[] Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 04/22] target-arm: Add arm_el_to_mmu_idx() Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 05/22] target-arm: Move get_mem_index to translate.h Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 06/22] target-arm: A64: Add SP entries for EL2 and 3 Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 07/22] target-arm: A64: Add ELR " Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 08/22] target-arm: Add SPSR entries for EL2/HYP and EL3/MON Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 09/22] target-arm: A64: Introduce aarch64_banked_spsr_index() Edgar E. Iglesias
2014-05-21 19:01 ` Peter Maydell
2014-05-21 23:50 ` Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 10/22] target-arm: Add a feature flag for EL2 Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 11/22] target-arm: Add a feature flag for EL3 Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 12/22] target-arm: Register EL2 versions of ELR and SPSR Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 13/22] target-arm: Register EL3 " Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 14/22] target-arm: A64: Forbid ERET to increase the EL Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 15/22] target-arm: A64: Forbid ERET to unimplemented ELs Edgar E. Iglesias
2014-05-21 19:06 ` Peter Maydell
2014-05-21 23:56 ` Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 16/22] target-arm: A64: Generalize ERET to various ELs Edgar E. Iglesias
2014-05-21 19:10 ` Peter Maydell
2014-05-22 0:56 ` Edgar E. Iglesias
2014-05-21 19:20 ` Peter Maydell
2014-05-22 0:48 ` Edgar E. Iglesias
2014-05-22 7:22 ` Peter Maydell
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 17/22] target-arm: A64: Generalize update_spsel for the " Edgar E. Iglesias
2014-05-19 9:22 ` [Qemu-devel] [PATCH v3 18/22] target-arm: Make vbar_write writeback to any CPREG Edgar E. Iglesias
2014-05-19 9:23 ` [Qemu-devel] [PATCH v3 19/22] target-arm: A64: Register VBAR_EL2 Edgar E. Iglesias
2014-05-20 9:02 ` Peter Crosthwaite
2014-05-21 1:01 ` Edgar E. Iglesias [this message]
2014-05-21 19:22 ` Peter Maydell
2014-05-22 1:11 ` Edgar E. Iglesias
2014-05-19 9:23 ` [Qemu-devel] [PATCH v3 20/22] target-arm: A64: Register VBAR_EL3 Edgar E. Iglesias
2014-05-19 9:23 ` [Qemu-devel] [PATCH v3 21/22] RFC: target-arm: A32: Use get_mem_index for load/stores Edgar E. Iglesias
2014-05-21 19:27 ` Peter Maydell
2014-05-22 1:12 ` Edgar E. Iglesias
2014-05-19 9:23 ` [Qemu-devel] [PATCH v3 22/22] RFC: target-arm: Use a 1:1 mapping between EL and MMU index Edgar E. Iglesias
2014-05-20 9:07 ` Peter Crosthwaite
2014-05-20 9:47 ` Aggeler Fabian
2014-05-20 13:28 ` Edgar E. Iglesias
2014-05-20 13:47 ` Peter Maydell
2014-05-20 13:51 ` Alexander Graf
2014-05-20 13:55 ` Edgar E. Iglesias
2014-05-20 9:11 ` [Qemu-devel] [PATCH v3 00/22] target-arm: Preparations for A64 EL2 and 3 Peter Crosthwaite
2014-05-21 19:30 ` Peter Maydell
2014-05-22 1:14 ` Edgar E. Iglesias
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