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Date: Thu, 5 Jun 2014 01:03:42 +1000
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
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Subject: Re: [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC
	insn
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To: Alex =?utf-8?B?QmVubu+/vWU=?= <alex.bennee@linaro.org>
Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, rob.herring@linaro.org, aggelerf@ethz.ch, qemu-devel@nongnu.org, agraf@suse.de, blauwirbel@gmail.com, john.williams@xilinx.com, greg.bellows@linaro.org, pbonzini@redhat.com, christoffer.dall@linaro.org, rth@twiddle.net

On Wed, Jun 04, 2014 at 08:26:51AM +0100, Alex Benn�e wrote:
> 
> Edgar E. Iglesias writes:
> 
> > On Tue, Jun 03, 2014 at 11:41:25AM +0100, Alex Benn?e wrote:
> >> 
> >> Edgar E. Iglesias writes:
> >> >  static inline void arm_log_exception(int idx)
> >> > @@ -204,6 +205,11 @@ static inline uint32_t syn_aa64_svc(uint32_t imm16)
> >> >      return (EC_AA64_SVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff);
> >> >  }
> >> >  
> >> > +static inline uint32_t syn_aa64_hvc(uint32_t imm16)
> >> > +{
> >> > +    return (EC_AA64_HVC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (imm16 & 0xffff);
> >> > +}
> >> 
> >> The mask seems superfluous (as it is for arm_log_exception)
> >
> > Sorry, can you clarify what you mean here? Are you refering to the imm16?
> 
> Yes the imm16. It's the result of an extract32(..,..,16) so I can't see
> how it wouldn't already be correctly masked.

Right, so my first version here had a uint16_t imm16, but I changed
it to keep it consistent with the other functions. I'm happy to
change things to match their use with additional patches. I'll do
something for v2.