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From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Aggeler Fabian <aggelerf@student.ethz.ch>
Cc: "peter.maydell@linaro.org" <peter.maydell@linaro.org>,
	"peter.crosthwaite@xilinx.com" <peter.crosthwaite@xilinx.com>,
	"rob.herring@linaro.org" <rob.herring@linaro.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"agraf@suse.de" <agraf@suse.de>,
	"blauwirbel@gmail.com" <blauwirbel@gmail.com>,
	"john.williams@xilinx.com" <john.williams@xilinx.com>,
	"greg.bellows@linaro.org" <greg.bellows@linaro.org>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"alex.bennee@linaro.org" <alex.bennee@linaro.org>,
	"christoffer.dall@linaro.org" <christoffer.dall@linaro.org>,
	"rth@twiddle.net" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v1 11/16] target-arm: Don't take interrupts targeting lower ELs
Date: Mon, 9 Jun 2014 09:43:40 +1000	[thread overview]
Message-ID: <20140608234340.GV18802@zapo.iiNet> (raw)
In-Reply-To: <3A45136B-A2A8-4363-90A6-436047C0C347@ethz.ch>

On Sun, Jun 08, 2014 at 03:51:24PM +0000, Aggeler  Fabian wrote:
> 
> On 30 May 2014, at 09:28, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> 
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> > 
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> > target-arm/cpu.h | 7 +++++++
> > 1 file changed, 7 insertions(+)
> > 
> > diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> > index 9eddcc1..66c58bd 100644
> > --- a/target-arm/cpu.h
> > +++ b/target-arm/cpu.h
> > @@ -1133,6 +1133,13 @@ bool write_cpustate_to_list(ARMCPU *cpu);
> > static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx)
> > {
> >     CPUARMState *env = cs->env_ptr;
> > +    unsigned int cur_el = arm_current_pl(env);
> > +    unsigned int target_el = arm_excp_target_el(cs, excp_idx);
> > +
> > +    /* Don't take exceptions if they target a lower EL.  */
> > +    if (cur_el > target_el) {
> > +        return false;
> > +    }
> 
> Hi Edgar

Hi Fabian,

> 
> When making arm_excp_unmasked() reflect tables D1-13, D1-14, D1-15 
> and G1-18, G1-19 in ARM ARMv8 this should not be necessary if I am 
> not mistaken. Cases in which target_el is lower than cur_el are marked with 
> a P (pending) in the table. Or am I missing something interpreting the
> tables?

This function is called to check if we can take a pending interrupt or
exception with current CPU state. It does not clear pending exceptions.
In this case, if the target_el is lower than the current EL we return false
and leave the exception pending (to be taken later).

> 
> I extended your arm_excp_unmasked() and arm_excp_target_el() to reflect 
> the behaviour shown in the tables in ARM ARMv8 and ARM ARMv7. I will 
> send them with the TZ patches.

Great, thanks.

Cheers,
Edgar


> 
> Best,
> Fabian
> 
> > 
> >     switch (excp_idx) {
> >     case EXCP_FIQ:
> > -- 
> > 1.8.3.2
> > 
> 

  reply	other threads:[~2014-06-08 23:44 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1401434911-26992-1-git-send-email-edgar.iglesias@gmail.com>
     [not found] ` <1401434911-26992-15-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  1:30   ` [Qemu-devel] [PATCH v1 14/16] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
     [not found]   ` <CAOgzsHWqsegcukD8Q45daqbWPSNWoAbcYZcUm1Qe7Wgf=f4FxA@mail.gmail.com>
     [not found]     ` <20140531034925.GP18802@zapo.iiNet>
2014-06-02 16:12       ` Greg Bellows
2014-06-04  2:31         ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-2-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  9:40   ` [Qemu-devel] [PATCH v1 01/16] target-arm: A64: Break out aarch64_save/restore_sp Alex Bennée
     [not found] ` <1401434911-26992-3-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  9:52   ` [Qemu-devel] [PATCH v1 02/16] target-arm: A64: Respect SPSEL in ERET SP restore Alex Bennée
     [not found] ` <1401434911-26992-4-git-send-email-edgar.iglesias@gmail.com>
2014-06-02  9:55   ` [Qemu-devel] [PATCH v1 03/16] target-arm: A64: Respect SPSEL when taking exceptions Alex Bennée
     [not found] ` <1401434911-26992-5-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:21   ` [Qemu-devel] [PATCH v1 04/16] target-arm: Make far_el1 an array Alex Bennée
2014-06-03 12:42     ` Greg Bellows
2014-06-03 13:35       ` Alex Bennée
2014-06-03 13:50         ` Greg Bellows
     [not found] ` <1401434911-26992-7-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:22   ` [Qemu-devel] [PATCH v1 06/16] target-arm: Add FAR_EL2 and 3 Alex Bennée
2014-06-04  2:33     ` Edgar E. Iglesias
2014-06-04  7:55       ` Alex Bennée
2014-06-04 15:08         ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-8-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:27   ` [Qemu-devel] [PATCH v1 07/16] target-arm: Add HCR_EL2 Alex Bennée
2014-06-04  6:52     ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-9-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:30   ` [Qemu-devel] [PATCH v1 08/16] target-arm: Add SCR_EL3 Alex Bennée
     [not found] ` <1401434911-26992-11-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:32   ` [Qemu-devel] [PATCH v1 10/16] target-arm: Break out exception masking to a separate func Alex Bennée
2014-06-04  6:55     ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-13-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:37   ` [Qemu-devel] [PATCH v1 12/16] target-arm: A64: Correct updates to FAR and ESR on exceptions Alex Bennée
     [not found] ` <1401434911-26992-14-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:41   ` [Qemu-devel] [PATCH v1 13/16] target-arm: A64: Emulate the HVC insn Alex Bennée
2014-06-04  7:01     ` Edgar E. Iglesias
2014-06-04  7:26       ` Alex Bennée
2014-06-04 15:03         ` Edgar E. Iglesias
     [not found] ` <1401434911-26992-16-git-send-email-edgar.iglesias@gmail.com>
2014-06-03 10:47   ` [Qemu-devel] [PATCH v1 15/16] target-arm: Add IRQ and FIQ routing to EL2 and 3 Alex Bennée
     [not found] ` <1401434911-26992-12-git-send-email-edgar.iglesias@gmail.com>
2014-06-08 15:51   ` [Qemu-devel] [PATCH v1 11/16] target-arm: Don't take interrupts targeting lower ELs Aggeler  Fabian
2014-06-08 23:43     ` Edgar E. Iglesias [this message]
2014-06-10 17:10       ` Aggeler  Fabian
2014-08-01 14:35 ` [Qemu-devel] [PATCH v1 00/16] target-arm: Parts of the AArch64 EL2/3 exception model Peter Maydell
2014-08-01 14:38   ` Peter Maydell
2014-08-05  8:53   ` Edgar E. Iglesias

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