From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41219) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WvPck-0001Rj-Lg for qemu-devel@nongnu.org; Fri, 13 Jun 2014 07:26:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WvPca-0005K6-7W for qemu-devel@nongnu.org; Fri, 13 Jun 2014 07:26:22 -0400 Received: from e06smtp12.uk.ibm.com ([195.75.94.108]:58660) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WvPcZ-0005Jr-VD for qemu-devel@nongnu.org; Fri, 13 Jun 2014 07:26:12 -0400 Received: from /spool/local by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 13 Jun 2014 12:26:10 +0100 From: Greg Kurz Date: Fri, 13 Jun 2014 13:26:04 +0200 Message-ID: <20140613112540.22108.18511.stgit@bahia.local> In-Reply-To: <20140613111703.22108.14322.stgit@bahia.local> References: <20140613111703.22108.14322.stgit@bahia.local> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v8 20/20] target-ppc: enable virtio endian ambivalent support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: Kevin Wolf , Peter Maydell , Stefan Hajnoczi , Juan Quintela , Rusty Russell , Alexander Graf , "Michael S. Tsirkin" , aneesh.kumar@linux.vnet.ibm.com, Anthony Liguori , Amit Shah , Paolo Bonzini , Andreas =?utf-8?q?F=C3=A4rber?= The device endianness is the cpu endianness at device reset time. Signed-off-by: Greg Kurz --- target-ppc/cpu.h | 2 ++ target-ppc/translate_init.c | 13 +++++++++++++ 2 files changed, 15 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 75ed5fa..b076a14 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -29,6 +29,8 @@ #define TARGET_LONG_BITS 64 #define TARGET_PAGE_BITS 12 +#define TARGET_IS_BIENDIAN 1 + /* Note that the official physical address space bits is 62-M where M is implementation dependent. I've not looked up M for the set of cpus we emulate at the system level. */ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 4d94015..2468c69 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8463,6 +8463,16 @@ static void ppc_cpu_reset(CPUState *s) tlb_flush(s, 1); } +#ifndef CONFIG_USER_ONLY +static bool ppc_cpu_is_big_endian(CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + return !msr_le; +} +#endif + static void ppc_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); @@ -8550,6 +8560,9 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) #else cc->gdb_core_xml_file = "power-core.xml"; #endif +#ifndef CONFIG_USER_ONLY + cc->virtio_is_big_endian = ppc_cpu_is_big_endian; +#endif dc->fw_name = "PowerPC,UNKNOWN"; }