From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48365) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwndU-00049K-Md for qemu-devel@nongnu.org; Tue, 17 Jun 2014 03:16:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WwndQ-000651-KT for qemu-devel@nongnu.org; Tue, 17 Jun 2014 03:16:52 -0400 Received: from mx1.redhat.com ([209.132.183.28]:3824) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwndQ-00064t-BB for qemu-devel@nongnu.org; Tue, 17 Jun 2014 03:16:48 -0400 Date: Tue, 17 Jun 2014 15:16:41 +0800 From: Stefan Hajnoczi Message-ID: <20140617071641.GI16768@stefanha-thinkpad.redhat.com> References: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="X0cz4bGbQuRbxrVl" Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [RFC v1 1/2] arm: Add the cortex-a9 CPU to the a9mpcore device List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , Paolo Bonzini , QEMU Developers , Alistair Francis --X0cz4bGbQuRbxrVl Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jun 16, 2014 at 05:46:24PM +1000, Peter Crosthwaite wrote: > On Mon, Jun 16, 2014 at 5:40 PM, Peter Maydell = wrote: > > On 10 June 2014 02:32, Alistair Francis w= rote: > >> This patch adds the Cortex-A9 ARM CPU to the A9MPCore. > > > > I think this is in general the right way to go. > > > >> + /* Properties for the A9 CPU */ > >> + DEFINE_PROP_UINT32("midr", A9MPPrivState, midr, 0), > >> + DEFINE_PROP_UINT64("reset-cbar", A9MPPrivState, reset_cbar, 0), > > > > It seems a bit error-prone if every container object has to manually > > mirror the properties of the individual CPUs out like this; maybe > > there's a better way we could come up with? > > > > Paolo, weren't you looking at passthrough properties for the > > virtio devices? > > >=20 > Stefan added support for QDEV property aliasing. >=20 > http://lists.gnu.org/archive/html/qemu-devel/2014-05/msg06489.html >=20 > The bigger issue though is how do you do an N:1 mapping. The container > should only have 1 "midr" prop, but it should mirror to all contained > CPUs. Should we add multiplicity to the aliasing feature? If we'll need 1:N alias properties in other places too. Stefan --X0cz4bGbQuRbxrVl Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBAgAGBQJTn+tZAAoJEJykq7OBq3PIjdcH/jei8/9CFZTI461oh5gPguFK skh9cax/7EskEQg/1gHeK0yyTsY0nPgr7jtZY5xlOY+cbv+GweBKjDlOxs63MANW MyBkUoPfvSsf8OdgN80+PY/CXqecjDe9YS58Qbg7jeyp2HfUsh3QTfFJoHn3Bz6y JMvAyL7Gdz8HxgzSavUchXmbFkxrLoESdw9Ap9XXJfUp5vjEUZi5upI3n57IWu/W guXdQZyAB2yW+Qno0wQpOTSricwCyJa7q8JJxTuPcEMtv5wMLM84cPZ4E9vWVvk1 GSv/3XVRSTNEM8dUWEISxvO2JRl6n+iwvr7J9lgkUVy8ZECDMlOJt/IsvABmxb4= =Xfn0 -----END PGP SIGNATURE----- --X0cz4bGbQuRbxrVl--