From: Aurelien Jarno <aurelien@aurel32.net>
To: Petar Jovanovic <petar.jovanovic@rt-rk.com>
Cc: rth@twiddle.net, qemu-devel@nongnu.org, afaerber@suse.de,
petar.jovanovic@imgtec.com
Subject: Re: [Qemu-devel] [v5 PATCH] target-mips: implement UserLocal Register
Date: Wed, 18 Jun 2014 20:24:43 +0200 [thread overview]
Message-ID: <20140618182443.GG24904@hall.aurel32.net> (raw)
In-Reply-To: <1403106500-66930-1-git-send-email-petar.jovanovic@rt-rk.com>
On Wed, Jun 18, 2014 at 05:48:20PM +0200, Petar Jovanovic wrote:
> From: Petar Jovanovic <petar.jovanovic@imgtec.com>
>
> From MIPS documentation (Volume III):
>
> UserLocal Register (CP0 Register 4, Select 2)
> Compliance Level: Recommended.
>
> The UserLocal register is a read-write register that is not interpreted by
> the hardware and conditionally readable via the RDHWR instruction.
>
> This register only exists if the Config3-ULRI register field is set.
>
> Privileged software may write this register with arbitrary information and
> make it accessible to unprivileged software via register 29 (ULR) of the
> RDHWR instruction. To do so, bit 29 of the HWREna register must be set to a
> 1 to enable unprivileged access to the register.
>
> Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Thanks for this new version, I just applied it.
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
prev parent reply other threads:[~2014-06-18 18:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-18 15:48 [Qemu-devel] [v5 PATCH] target-mips: implement UserLocal Register Petar Jovanovic
2014-06-18 15:57 ` Andreas Färber
2014-06-18 18:24 ` Aurelien Jarno [this message]
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