From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56789) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzJrz-0002a3-Nm for qemu-devel@nongnu.org; Tue, 24 Jun 2014 02:06:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WzJrt-0007Ru-JR for qemu-devel@nongnu.org; Tue, 24 Jun 2014 02:06:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38859) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WzJrt-0007Rl-CJ for qemu-devel@nongnu.org; Tue, 24 Jun 2014 02:06:09 -0400 Date: Tue, 24 Jun 2014 08:06:05 +0200 From: Igor Mammedov Message-ID: <20140624080605.628c7874@nial.usersys.redhat.com> In-Reply-To: <1403585199-25321-1-git-send-email-mst@redhat.com> References: <1403585199-25321-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] openrisc: fix comment List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: qemu-devel@nongnu.org, Jia Liu On Tue, 24 Jun 2014 07:46:43 +0300 "Michael S. Tsirkin" wrote: > Fix English in comment: > > s/the each/each/ > > s/ \*\// \*\// > > Signed-off-by: Michael S. Tsirkin > --- > target-openrisc/translate.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c > index b728718..55ff935 100644 > --- a/target-openrisc/translate.c > +++ b/target-openrisc/translate.c > @@ -531,14 +531,14 @@ static void dec_calc(DisasContext *dc, uint32_t insn) > TCGv_i64 high = tcg_temp_new_i64(); > TCGv_i32 sr_ove = tcg_temp_local_new_i32(); > int lab = gen_new_label(); > - /* Calculate the each result. */ > + /* Calculate each result. */ > tcg_gen_extu_i32_i64(tra, cpu_R[ra]); > tcg_gen_extu_i32_i64(trb, cpu_R[rb]); > tcg_gen_mul_i64(result, tra, trb); > tcg_temp_free_i64(tra); > tcg_temp_free_i64(trb); > tcg_gen_shri_i64(high, result, TARGET_LONG_BITS); > - /* Overflow or not. */ > + /* Overflow or not. */ > tcg_gen_brcondi_i64(TCG_COND_EQ, high, 0x00000000, lab); > tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); > tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); Reviewed-by: Igor Mammedov