From: Kevin Wolf <kwolf@redhat.com>
To: Alexander Graf <agraf@suse.de>
Cc: "qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers
Date: Tue, 24 Jun 2014 14:07:03 +0200 [thread overview]
Message-ID: <20140624120703.GG3458@noname.redhat.com> (raw)
In-Reply-To: <53A960B9.8070900@suse.de>
Am 24.06.2014 um 13:27 hat Alexander Graf geschrieben:
>
> On 24.06.14 13:22, Kevin Wolf wrote:
> >Am 24.06.2014 um 13:02 hat Alexander Graf geschrieben:
> >>The way DBDMA works is that you put in something similar to a
> >>scatter-gather list: A list of chunks to read / write and where in
> >>memory those chunks live. DBDMA then goes over its list and does the
> >>pokes. So for example if the list is
> >>
> >> [ memaddr = 0x12000 | len = 500 ]
> >> [ memaddr = 0x13098 | len = 12 ]
> >>
> >>then it reads 500 bytes from IDE, writes them at memory offset
> >>0x12000 and after that reads another 12 bytes from IDE and puts them
> >>at memory offset 0x13098.
> >>
> >>The reason we have such complicated code for real DMA is that we
> >>can't model this easily with our direct block-to-memory API. That
> >>one can only work on a 512 byte granularity. So when we see
> >>unaligned accesses like above, we have to split them out and handle
> >>them lazily.
> >Wait... What kind of granularity are you talking about?
> >
> >We do need disk accesses with a 512 byte granularity, because the API
> >takes a sector number. This is also what real IDE disks do, they don't
> >provide byte access.
> >
> >However, for the memory, I can't see why you couldn't pass a s/g list
> >like what you wrote above to the DMA functions. This is not unusual at
> >all and is the same as ide/pci.c does. There is no 512-byte alignment
> >needed for the individual s/g list entries, only the total size should
> >obviously be a multiple of 512 in the general case (otherwise the list
> >would be too short or too long for the request).
> >
> >If this is really what we're talking about, then I think your problem is
> >just that you try to handle the 500 byte and the 12 byte as individual
> >requests instead of building up the s/g list and then sending a single
> >request.
>
> The 500 and 12 byte requests can come in as separate requests that
> require previous requests to have finished. What Mac OS X does for
> example is
>
> [ memaddr = 0x2000 | len = 1024 ]
> [ memaddr = 0x1000 | len = 510 ]
>
> <wait for ack>
>
> [ memaddr = 0x10fe | len = 2 ]
> [ memaddr = 0x3000 | len = 2048 ]
>
> If it was as simple as creating a working sglist, I would've
> certainly done so long ago :).
Thanks, that's the explanation that was missing for me (I'm sure you
explained it more than once to me in the past few years, but I keep
forgetting).
This means, however, that exposing the byte access in the block layer is
probably not what you want. Otherwise you would read the same sector
twice from the image (assuming cache=none, so the backend must have
512-byte alignment). If you do the handling in the device emulation you
can read the full request once and then only do the DMA part with a byte
granularity. I suppose this is the complicated code that you have today?
Kevin
next prev parent reply other threads:[~2014-06-24 12:08 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-04 12:43 [Qemu-devel] [PULL 00/118] ppc patch queue 2014-06-04 Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 001/118] target-ppc: Fix target_disas Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 002/118] monitor: QEMU Monitor Instruction Disassembly Incorrect for PowerPC LE Mode Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 003/118] Fix typo in eTSEC Ethernet controller Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 004/118] spapr_nvram: Correct max nvram size Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 005/118] target-ppc: extract register length calculation in gdbstub Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 006/118] target-ppc: gdbstub allow byte swapping for reading/writing registers Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 007/118] target-ppc: Create versionless CPU class per family if KVM Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 008/118] target-ppc: Move alias lookup after class lookup Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 009/118] target-ppc: Remove redundant POWER7 declarations Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 010/118] spapr-pci: remove io ports workaround Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 011/118] spapr_pci: Fix number of returned vectors in ibm, change-msi Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 012/118] target-ppc: Eliminate Magic Number MSR Masks Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 013/118] target-ppc: Remove PVR check from migration Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 014/118] mac99: Added FW_CFG_PPC_BUSFREQ to match CLOCKFREQ and TBFREQ already there Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 015/118] libdecnumber: Introduce libdecnumber Code Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 016/118] libdecnumber: Eliminate #include *Symbols.h Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 017/118] libdecnumber: Prepare libdecnumber for QEMU include structure Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 018/118] libdecnumber: Modify dconfig.h to Integrate with QEMU Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 019/118] libdecnumber: Change gstdint.h to stdint.h Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 020/118] libdecnumber: Eliminate redundant declarations Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 021/118] libdecnumber: Eliminate Unused Variable in decSetSubnormal Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 022/118] target-ppc: Enable Building of libdecnumber Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 023/118] libdecnumber: Introduce decNumberFrom[U]Int64 Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 024/118] libdecnumber: Introduce decNumberIntegralToInt64 Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 025/118] libdecnumber: Fix decNumberSetBCD Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 026/118] target-ppc: Define FPR Pointer Type for Helpers Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 027/118] target-ppc: Introduce Generator Macros for DFP Arithmetic Forms Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 028/118] target-ppc: Introduce Decoder Macros for DFP Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 029/118] target-ppc: Introduce DFP Helper Utilities Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 030/118] target-ppc: Introduce DFP Post Processor Utilities Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 031/118] target-ppc: Introduce DFP Add Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 032/118] target-ppc: Introduce DFP Subtract Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 033/118] target-ppc: Introduce DFP Multiply Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 034/118] target-ppc: Introduce DFP Divide Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 035/118] target-ppc: Introduce DFP Compares Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 036/118] target-ppc: Introduce DFP Test Data Class Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 037/118] target-ppc: Introduce DFP Test Data Group Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 038/118] target-ppc: Introduce DFP Test Exponent Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 039/118] target-ppc: Introduce DFP Test Significance Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 040/118] target-ppc: Introduce DFP Quantize Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 041/118] target-ppc: Introduce DFP Reround Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 042/118] target-ppc: Introduce DFP Round to Integer Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 043/118] target-ppc: Introduce DFP Convert to Long/Extended Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 044/118] target-ppc: Introduce Round to DFP Short/Long Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 045/118] target-ppc: Introduce DFP Convert to Fixed Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 046/118] " Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 047/118] target-ppc: Introduce DFP Decode DPD to BCD Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 048/118] target-ppc: Introduce DFP Encode BCD to DPD Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 049/118] target-ppc: Introduce DFP Extract Biased Exponent Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 050/118] target-ppc: Introduce DFP Insert " Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 051/118] target-ppc: Introduce DFP Shift Significand Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 052/118] spapr_pci: fix MSI limit Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 053/118] util: Add S-Box and InvS-Box Arrays to Common AES Utils Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 054/118] util: Add AES ShiftRows and InvShiftRows Tables Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 055/118] util: Add InvMixColumns Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 056/118] target-i386: Use Common ShiftRows and InvShiftRows Tables Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 057/118] target-arm: Use Common Tables in AES Instructions Alexander Graf
2014-06-04 12:43 ` [Qemu-devel] [PULL 058/118] target-ppc: Refactor " Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 059/118] KVM: PPC: Don't secretly add 1T segment feature to CPU Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 060/118] PPC: e500: some pci related cleanup Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 061/118] PPC: e500: implement PCI INTx routing Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 062/118] PPC: Fix TCG chunks that don't free their temps Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 063/118] PPC: Fail on leaking temporaries Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 064/118] PPC: Make all e500 CPUs SVR aware Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 065/118] PPC: Add definitions for GIVORs Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 066/118] PPC: Fix SPR access control of L1CFG0 Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 067/118] PPC: Add L1CFG1 SPR emulation Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 068/118] PPC: Properly emulate L1CSR0 and L1CSR1 Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 069/118] PPC: Add dcbtls emulation Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 070/118] PPC: e500: Expose kernel load address in dt Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 071/118] PPC: Add u-boot firmware for e500 Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 072/118] PPC: e500: Move to u-boot as firmware Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 073/118] spapr: Add support for time base offset migration Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 074/118] spapr: Add ibm, chip-id property in device tree Alexander Graf
2014-06-04 12:44 ` [Qemu-devel] [PULL 075/118] macio: handle non-block ATAPI DMA transfers Alexander Graf
2014-06-20 14:29 ` Mark Cave-Ayland
2014-06-20 19:17 ` BALATON Zoltan
2014-06-20 19:27 ` Mark Cave-Ayland
2014-06-21 0:57 ` BALATON Zoltan
2014-06-23 16:31 ` Alexander Graf
2014-06-23 19:26 ` BALATON Zoltan
2014-06-23 22:41 ` Mark Cave-Ayland
2014-06-24 10:35 ` Kevin Wolf
2014-06-24 10:53 ` BALATON Zoltan
2014-06-24 11:02 ` Alexander Graf
2014-06-24 11:22 ` Kevin Wolf
2014-06-24 11:27 ` Alexander Graf
2014-06-24 12:07 ` Kevin Wolf [this message]
2014-06-24 12:10 ` Alexander Graf
2014-06-25 20:17 ` Mark Cave-Ayland
2014-06-25 21:48 ` BALATON Zoltan
2014-06-23 21:30 ` BALATON Zoltan
2014-06-05 19:10 ` [Qemu-devel] [PULL 00/118] ppc patch queue 2014-06-04 Peter Maydell
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