From: "Michael S. Tsirkin" <mst@redhat.com>
To: Tiejun Chen <tiejun.chen@intel.com>
Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com,
stefano.stabellini@eu.citrix.com, allen.m.kay@intel.com,
qemu-devel@nongnu.org, Kelly.Zytaruk@amd.com,
yang.z.zhang@intel.com, anthony@codemonkey.ws,
anthony.perard@citrix.com, pbonzini@redhat.com
Subject: Re: [Qemu-devel] [v5][PATCH 5/5] xen, gfx passthrough: add opregion mapping
Date: Wed, 25 Jun 2014 10:13:21 +0300 [thread overview]
Message-ID: <20140625071321.GD25563@redhat.com> (raw)
In-Reply-To: <1403662641-28526-6-git-send-email-tiejun.chen@intel.com>
On Wed, Jun 25, 2014 at 10:17:21AM +0800, Tiejun Chen wrote:
> The OpRegion shouldn't be mapped 1:1 because the address in the host
> can't be used in the guest directly.
>
> This patch traps read and write access to the opregion of the Intel
> GPU config space (offset 0xfc).
>
> The original patch is from Jean Guyader <jean.guyader@eu.citrix.com>
>
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
> Cc: Jean Guyader <jean.guyader@eu.citrix.com>
> ---
> v5:
>
> * Nothing is changed.
>
> v4:
>
> * Nothing is changed.
>
> v3:
>
> * Fix some typos.
> * Add more comments to make that readable.
> * To unmap igd_opregion when call xen_pt_unregister_vga_regions().
> * Improve some return paths.
> * We need to map 3 pages for opregion as hvmloader set.
> * Force to convert igd_guest/host_opoegion as an unsigned long type
> while calling xc_domain_memory_mapping().
>
> v2:
>
> * We should return zero as an invalid address value while calling
> igd_read_opregion().
>
> hw/xen/xen_pt.h | 4 ++-
> hw/xen/xen_pt_config_init.c | 50 ++++++++++++++++++++++++++++++++++-
> hw/xen/xen_pt_graphics.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 116 insertions(+), 2 deletions(-)
>
> diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
> index 507165c..25147cf 100644
> --- a/hw/xen/xen_pt.h
> +++ b/hw/xen/xen_pt.h
> @@ -63,7 +63,7 @@ typedef int (*xen_pt_conf_byte_read)
> #define XEN_PT_BAR_UNMAPPED (-1)
>
> #define PCI_CAP_MAX 48
> -
> +#define PCI_INTEL_OPREGION 0xfc
>
XEN_.... please
PCI_CAP_MAX should be fixed too.
> typedef enum {
> XEN_PT_GRP_TYPE_HARDWIRED = 0, /* 0 Hardwired reg group */
> @@ -306,5 +306,7 @@ int pci_create_pch(PCIBus *bus);
> void igd_pci_write(PCIDevice *pci_dev, uint32_t config_addr,
> uint32_t val, int len);
> uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len);
> +uint32_t igd_read_opregion(XenPCIPassthroughState *s);
> +void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
>
> #endif /* !XEN_PT_H */
> diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c
> index de9a20f..6eaaa9a 100644
> --- a/hw/xen/xen_pt_config_init.c
> +++ b/hw/xen/xen_pt_config_init.c
> @@ -575,6 +575,22 @@ static int xen_pt_exp_rom_bar_reg_write(XenPCIPassthroughState *s,
> return 0;
> }
>
> +static int xen_pt_intel_opregion_read(XenPCIPassthroughState *s,
> + XenPTReg *cfg_entry,
> + uint32_t *value, uint32_t valid_mask)
> +{
> + *value = igd_read_opregion(s);
> + return 0;
> +}
> +
> +static int xen_pt_intel_opregion_write(XenPCIPassthroughState *s,
> + XenPTReg *cfg_entry, uint32_t *value,
> + uint32_t dev_value, uint32_t valid_mask)
> +{
> + igd_write_opregion(s, *value);
> + return 0;
> +}
> +
> /* Header Type0 reg static information table */
> static XenPTRegInfo xen_pt_emu_reg_header0[] = {
> /* Vendor ID reg */
> @@ -1440,6 +1456,20 @@ static XenPTRegInfo xen_pt_emu_reg_msix[] = {
> },
> };
>
> +static XenPTRegInfo xen_pt_emu_reg_igd_opregion[] = {
> + /* Intel IGFX OpRegion reg */
> + {
> + .offset = 0x0,
> + .size = 4,
> + .init_val = 0,
> + .no_wb = 1,
> + .u.dw.read = xen_pt_intel_opregion_read,
> + .u.dw.write = xen_pt_intel_opregion_write,
> + },
> + {
> + .size = 0,
> + },
> +};
>
> /****************************
> * Capabilities
> @@ -1677,6 +1707,14 @@ static const XenPTRegGroupInfo xen_pt_emu_reg_grps[] = {
> .size_init = xen_pt_msix_size_init,
> .emu_regs = xen_pt_emu_reg_msix,
> },
> + /* Intel IGD Opregion group */
> + {
> + .grp_id = PCI_INTEL_OPREGION,
> + .grp_type = XEN_PT_GRP_TYPE_EMU,
> + .grp_size = 0x4,
> + .size_init = xen_pt_reg_grp_size_init,
> + .emu_regs = xen_pt_emu_reg_igd_opregion,
> + },
> {
> .grp_size = 0,
> },
> @@ -1806,7 +1844,8 @@ int xen_pt_config_init(XenPCIPassthroughState *s)
> uint32_t reg_grp_offset = 0;
> XenPTRegGroup *reg_grp_entry = NULL;
>
> - if (xen_pt_emu_reg_grps[i].grp_id != 0xFF) {
> + if (xen_pt_emu_reg_grps[i].grp_id != 0xFF
> + && xen_pt_emu_reg_grps[i].grp_id != PCI_INTEL_OPREGION) {
> if (xen_pt_hide_dev_cap(&s->real_device,
> xen_pt_emu_reg_grps[i].grp_id)) {
> continue;
> @@ -1819,6 +1858,15 @@ int xen_pt_config_init(XenPCIPassthroughState *s)
> }
> }
>
> + /*
> + * By default we will trap up to 0x40 in the cfg space.
> + * If an intel device is pass through we need to trap 0xfc,
> + * therefore the size should be 0xff.
> + */
> + if (xen_pt_emu_reg_grps[i].grp_id == PCI_INTEL_OPREGION) {
> + reg_grp_offset = PCI_INTEL_OPREGION;
> + }
> +
> reg_grp_entry = g_new0(XenPTRegGroup, 1);
> QLIST_INIT(®_grp_entry->reg_tbl_list);
> QLIST_INSERT_HEAD(&s->reg_grps, reg_grp_entry, entries);
> diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c
> index f3fbfed..fa341ad 100644
> --- a/hw/xen/xen_pt_graphics.c
> +++ b/hw/xen/xen_pt_graphics.c
> @@ -6,6 +6,9 @@
> #include "hw/xen/xen_backend.h"
> #include "hw/pci/pci_bus.h"
>
> +static unsigned long igd_guest_opregion;
> +static unsigned long igd_host_opregion;
> +
> static int is_vga_passthrough(XenHostPCIDevice *dev)
> {
> return (xen_has_gfx_passthru
> @@ -88,6 +91,7 @@ int xen_pt_register_vga_regions(XenHostPCIDevice *dev)
> int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev)
> {
> int i = 0;
> + int ret = 0;
>
> if (!is_vga_passthrough(dev)) {
> return 0;
> @@ -114,6 +118,17 @@ int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev)
> }
> }
>
> + if (igd_guest_opregion) {
> + ret = xc_domain_memory_mapping(xen_xc, xen_domid,
> + (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT),
> + (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
don't spread casts all around.
Should be a last resort.
> + 3,
> + DPCI_REMOVE_MAPPING);
> + if (ret) {
> + return ret;
> + }
> + }
> +
> return 0;
> }
>
> @@ -447,3 +462,52 @@ err_out:
> XEN_PT_ERR(pci_dev, "Can't get pci_dev_host_bridge\n");
> return -1;
> }
> +
> +uint32_t igd_read_opregion(XenPCIPassthroughState *s)
> +{
> + uint32_t val = 0;
> +
> + if (igd_guest_opregion == 0) {
!igd_guest_opregion is shorter and does the same,
> + return val;
> + }
> +
> + val = igd_guest_opregion;
> +
> + XEN_PT_LOG(&s->dev, "Read opregion val=%x\n", val);
> + return val;
> +}
> +
> +void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val)
> +{
> + int ret;
> +
> + if (igd_guest_opregion) {
> + XEN_PT_LOG(&s->dev, "opregion register already been set, ignoring %x\n",
> + val);
> + return;
> + }
> +
> + xen_host_pci_get_block(&s->real_device, PCI_INTEL_OPREGION,
> + (uint8_t *)&igd_host_opregion, 4);
> + igd_guest_opregion = (unsigned long)(val & ~0xfff)
> + | (igd_host_opregion & 0xfff);
> +
Clearly broken on BE.
Maybe not important here but writing clean code is
just as easy.
uint8_t igd_host_opregion[4];
...
xen_host_pci_get_block(&s->real_device, PCI_INTEL_OPREGION,
igd_host_opregion, sizeof igd_host_opregion);
igd_guest_opregion = (val & ~0xfff) |
(pci_get_word(igd_host_opregion) & 0xfff);
0xfff should be a macro too to avoid duplication.
> + ret = xc_domain_memory_mapping(xen_xc, xen_domid,
> + (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT),
> + (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
> + 3,
> + DPCI_ADD_MAPPING);
> +
> + if (ret) {
> + XEN_PT_ERR(&s->dev, "[%d]:Can't map IGD host opregion:0x%lx to"
> + " guest opregion:0x%lx.\n", ret,
> + (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
> + (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT));
> + igd_guest_opregion = 0;
> + return;
> + }
> +
> + XEN_PT_LOG(&s->dev, "Map OpRegion: 0x%lx -> 0x%lx\n",
> + (unsigned long)(igd_host_opregion >> XC_PAGE_SHIFT),
> + (unsigned long)(igd_guest_opregion >> XC_PAGE_SHIFT));
> +}
> --
> 1.9.1
next prev parent reply other threads:[~2014-06-25 7:13 UTC|newest]
Thread overview: 169+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-25 2:17 [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Tiejun Chen
2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 1/5] xen, gfx passthrough: basic graphics " Tiejun Chen
2014-06-25 6:21 ` Paolo Bonzini
2014-06-25 7:48 ` Chen, Tiejun
2014-06-25 6:35 ` Michael S. Tsirkin
2014-06-25 9:06 ` Chen, Tiejun
2014-06-25 9:16 ` Michael S. Tsirkin
2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 2/5] xen, gfx passthrough: create pseudo intel isa bridge Tiejun Chen
2014-06-25 6:22 ` Paolo Bonzini
2014-06-25 7:51 ` Chen, Tiejun
2014-06-25 6:45 ` Michael S. Tsirkin
2014-06-25 8:10 ` Chen, Tiejun
2014-06-25 8:28 ` Michael S. Tsirkin
2014-06-25 8:39 ` Chen, Tiejun
2014-06-25 8:43 ` Michael S. Tsirkin
2014-06-25 8:48 ` Chen, Tiejun
2014-06-25 9:04 ` Michael S. Tsirkin
2014-06-25 9:14 ` Chen, Tiejun
2014-06-25 9:21 ` Michael S. Tsirkin
2014-06-25 9:28 ` Chen, Tiejun
2014-06-25 9:44 ` Michael S. Tsirkin
2014-06-25 9:58 ` Chen, Tiejun
2014-06-27 7:22 ` Chen, Tiejun
2014-06-30 19:34 ` Stefano Stabellini
2014-07-01 2:21 ` Chen, Tiejun
2014-07-01 5:47 ` Michael S. Tsirkin
2014-07-01 9:50 ` Chen, Tiejun
2014-07-01 12:34 ` Michael S. Tsirkin
2014-07-01 16:51 ` Stefano Stabellini
2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 3/5] xen, gfx passthrough: support Intel IGD passthrough with VT-D Tiejun Chen
2014-06-25 6:25 ` Paolo Bonzini
2014-06-25 7:54 ` Chen, Tiejun
2014-06-25 7:04 ` Michael S. Tsirkin
2014-06-27 9:16 ` Chen, Tiejun
2014-06-25 14:05 ` Michael S. Tsirkin
2014-06-26 5:34 ` Chen, Tiejun
2014-06-26 6:04 ` Michael S. Tsirkin
2014-06-26 8:26 ` Chen, Tiejun
2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 4/5] xen, gfx passthrough: create host bridge to passthrough Tiejun Chen
2014-06-25 6:24 ` Paolo Bonzini
2014-06-27 8:34 ` Chen, Tiejun
2014-06-27 11:26 ` Paolo Bonzini
2014-06-29 7:56 ` Chen, Tiejun
2014-06-29 12:14 ` Michael S. Tsirkin
2014-06-30 2:52 ` Chen, Tiejun
2014-06-30 19:42 ` Stefano Stabellini
2014-07-01 2:19 ` Chen, Tiejun
2014-07-01 16:49 ` Stefano Stabellini
2014-07-01 18:34 ` Michael S. Tsirkin
2014-07-01 18:45 ` Michael S. Tsirkin
2014-06-25 2:17 ` [Qemu-devel] [v5][PATCH 5/5] xen, gfx passthrough: add opregion mapping Tiejun Chen
2014-06-25 7:13 ` Michael S. Tsirkin [this message]
2014-06-27 9:22 ` Chen, Tiejun
2014-06-29 11:43 ` Michael S. Tsirkin
2014-06-30 0:57 ` Chen, Tiejun
2014-06-25 6:19 ` [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support Paolo Bonzini
2014-06-25 7:15 ` Michael S. Tsirkin
2014-06-25 7:56 ` Paolo Bonzini
2014-06-25 7:35 ` Chen, Tiejun
2014-06-25 7:40 ` Michael S. Tsirkin
2014-06-25 7:44 ` Paolo Bonzini
2014-06-25 8:31 ` Michael S. Tsirkin
2014-06-25 8:39 ` Paolo Bonzini
2014-06-25 8:48 ` Michael S. Tsirkin
2014-06-25 8:55 ` Chen, Tiejun
2014-06-25 9:09 ` Michael S. Tsirkin
2014-06-25 9:21 ` Chen, Tiejun
2014-06-25 9:31 ` Paolo Bonzini
2014-06-25 9:50 ` Chen, Tiejun
2014-06-25 9:54 ` Paolo Bonzini
2014-06-25 10:00 ` Michael S. Tsirkin
2014-06-26 9:18 ` Chen, Tiejun
2014-06-26 10:03 ` Paolo Bonzini
2014-06-26 11:26 ` Michael S. Tsirkin
2014-06-26 11:30 ` Paolo Bonzini
2014-06-26 11:36 ` Michael S. Tsirkin
2014-06-26 13:30 ` Paolo Bonzini
2014-06-26 15:40 ` Michael S. Tsirkin
2014-06-30 2:51 ` Chen, Tiejun
2014-06-30 6:48 ` Michael S. Tsirkin
2014-06-30 7:24 ` Chen, Tiejun
2014-06-30 9:05 ` Michael S. Tsirkin
2014-06-30 9:38 ` Chen, Tiejun
2014-06-30 9:55 ` Michael S. Tsirkin
2014-06-30 10:20 ` [Qemu-devel] [Xen-devel] " Chen, Tiejun
2014-06-30 11:18 ` Paolo Bonzini
2014-06-30 11:31 ` Michael S. Tsirkin
2014-06-30 11:28 ` Michael S. Tsirkin
2014-07-01 2:40 ` Chen, Tiejun
2014-07-01 9:12 ` Michael S. Tsirkin
2014-07-01 9:46 ` Chen, Tiejun
2014-07-01 12:33 ` Michael S. Tsirkin
2014-07-02 0:59 ` Chen, Tiejun
2014-07-02 6:22 ` Michael S. Tsirkin
2014-07-02 8:45 ` Chen, Tiejun
2014-06-30 19:22 ` [Qemu-devel] " Stefano Stabellini
2014-06-30 19:31 ` [Qemu-devel] [Xen-devel] " Ross Philipson
2014-07-01 2:24 ` Chen, Tiejun
2014-07-01 5:39 ` Michael S. Tsirkin
2014-07-01 16:47 ` Stefano Stabellini
2014-07-01 17:02 ` Michael S. Tsirkin
2014-07-01 17:39 ` Ross Philipson
2014-07-01 18:06 ` Michael S. Tsirkin
2014-07-01 19:29 ` Ross Philipson
2014-07-02 6:11 ` Michael S. Tsirkin
2014-07-02 7:56 ` Chen, Tiejun
2014-07-02 11:33 ` Paolo Bonzini
2014-07-02 14:00 ` Konrad Rzeszutek Wilk
2014-07-02 14:07 ` Stefano Stabellini
2014-07-03 3:00 ` Chen, Tiejun
2014-07-03 18:25 ` Konrad Rzeszutek Wilk
2014-07-02 14:08 ` Michael S. Tsirkin
2014-07-02 16:05 ` Konrad Rzeszutek Wilk
2014-07-02 17:58 ` Michael S. Tsirkin
2014-07-02 14:50 ` [Qemu-devel] ResettRe: " Paolo Bonzini
2014-07-02 15:12 ` Michael S. Tsirkin
2014-07-02 19:33 ` Alex Williamson
2014-07-02 16:23 ` Konrad Rzeszutek Wilk
2014-07-02 16:27 ` Paolo Bonzini
2014-07-02 16:53 ` Michael S. Tsirkin
2014-07-03 7:32 ` Michael S. Tsirkin
2014-07-03 18:26 ` Konrad Rzeszutek Wilk
2014-07-03 19:09 ` [Qemu-devel] [Intel-gfx] " Jesse Barnes
2014-07-03 20:27 ` Michael S. Tsirkin
2014-07-16 14:20 ` Konrad Rzeszutek Wilk
2014-07-17 9:42 ` Chen, Tiejun
2014-07-17 17:37 ` Kay, Allen M
2014-07-18 13:44 ` Konrad Rzeszutek Wilk
2014-07-19 0:27 ` Kay, Allen M
2014-07-23 20:54 ` Konrad Rzeszutek Wilk
2014-07-24 1:44 ` Chen, Tiejun
2014-07-25 17:01 ` Konrad Rzeszutek Wilk
2014-07-29 6:59 ` Chen, Tiejun
2014-07-29 8:32 ` Paolo Bonzini
2014-07-29 9:14 ` Chen, Tiejun
2014-07-04 6:28 ` [Qemu-devel] " Paolo Bonzini
2014-07-06 6:08 ` Michael S. Tsirkin
2014-07-02 15:15 ` [Qemu-devel] " Ross Philipson
2014-07-02 15:27 ` Michael S. Tsirkin
2014-07-02 16:29 ` Paolo Bonzini
2014-07-02 16:45 ` Konrad Rzeszutek Wilk
2014-07-02 18:00 ` Michael S. Tsirkin
2014-07-03 5:57 ` Chen, Tiejun
2014-07-03 6:40 ` Michael S. Tsirkin
2014-07-01 18:20 ` Stefano Stabellini
2014-07-01 18:38 ` Michael S. Tsirkin
2014-07-02 1:37 ` Chen, Tiejun
2014-07-02 6:09 ` Michael S. Tsirkin
2014-07-02 7:51 ` Chen, Tiejun
2014-06-25 9:55 ` [Qemu-devel] " Michael S. Tsirkin
2014-06-25 9:59 ` Paolo Bonzini
2014-06-25 10:06 ` Chen, Tiejun
2014-06-25 10:21 ` Michael S. Tsirkin
2014-06-25 10:28 ` Chen, Tiejun
2014-06-25 10:32 ` Michael S. Tsirkin
2014-06-25 10:37 ` Chen, Tiejun
2014-06-25 10:55 ` Michael S. Tsirkin
2014-06-25 12:11 ` Paolo Bonzini
2014-06-25 13:47 ` Michael S. Tsirkin
2014-06-25 13:53 ` Paolo Bonzini
2014-06-25 14:10 ` Michael S. Tsirkin
2014-06-25 14:16 ` Paolo Bonzini
2014-06-25 14:26 ` Michael S. Tsirkin
2014-06-25 10:09 ` Michael S. Tsirkin
2014-06-25 10:14 ` Paolo Bonzini
2014-06-25 10:15 ` Chen, Tiejun
2014-06-25 10:28 ` Michael S. Tsirkin
2014-06-25 9:43 ` Michael S. Tsirkin
2014-07-08 10:45 ` [Qemu-devel] [Xen-devel] " Andrew Barnes
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