From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60313) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0RbJ-0000Gj-1D for qemu-devel@nongnu.org; Fri, 27 Jun 2014 04:33:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0RbA-00015s-N9 for qemu-devel@nongnu.org; Fri, 27 Jun 2014 04:33:40 -0400 Received: from e06smtp15.uk.ibm.com ([195.75.94.111]:59572) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0RbA-00015j-E2 for qemu-devel@nongnu.org; Fri, 27 Jun 2014 04:33:32 -0400 Received: from /spool/local by e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 27 Jun 2014 09:33:31 +0100 Received: from b06cxnps4076.portsmouth.uk.ibm.com (d06relay13.portsmouth.uk.ibm.com [9.149.109.198]) by d06dlp02.portsmouth.uk.ibm.com (Postfix) with ESMTP id E0FC3219005F for ; Fri, 27 Jun 2014 09:33:16 +0100 (BST) Received: from d06av05.portsmouth.uk.ibm.com (d06av05.portsmouth.uk.ibm.com [9.149.37.229]) by b06cxnps4076.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s5R8XTAQ27328616 for ; Fri, 27 Jun 2014 08:33:29 GMT Received: from d06av05.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av05.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s5R8XS2Q031001 for ; Fri, 27 Jun 2014 02:33:29 -0600 Date: Fri, 27 Jun 2014 10:33:19 +0200 From: Greg Kurz Message-ID: <20140627103319.0bff8d49@bahia.local> In-Reply-To: <1403843160-30332-1-git-send-email-rth@twiddle.net> References: <1403843160-30332-1-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] tcg/ppc: Fix failure in tcg_out_mem_long List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: tommusta@gmail.com, clg@fr.ibm.com, qemu-devel@nongnu.org On Thu, 26 Jun 2014 21:26:00 -0700 Richard Henderson wrote: > With rt != r0 on loads, we use rt for scratch. If we need an index > register different from base, we can't use rt, but r0 is usable. > > Signed-off-by: Richard Henderson > --- > This ought to fix the problem that Greg reported. > Thanks Richard ! > That we need to use --enable-debug-tcg to see the assert, and that I > didn't previously do testing with that is disappointing. I'm thinking > that we ought to do something like gcc wrt --enable-checking=release > vs development, so that we can't do normal development withing these > asserts enabled. More on that later... > > > r~ Makes sense. Cheers. -- Greg > --- > tcg/ppc/tcg-target.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c > index c83fd9f..dd84e76 100644 > --- a/tcg/ppc/tcg-target.c > +++ b/tcg/ppc/tcg-target.c > @@ -805,7 +805,10 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt, > > /* For unaligned, or very large offsets, use the indexed form. */ > if (offset & align || offset != (int32_t)offset) { > - tcg_debug_assert(rs != base && (!is_store || rs != rt)); > + if (rs == base) { > + rs = TCG_REG_R0; > + } > + tcg_debug_assert(!is_store || rs != rt); > tcg_out_movi(s, TCG_TYPE_PTR, rs, orig); > tcg_out32(s, opx | TAB(rt, base, rs)); > return; -- Gregory Kurz kurzgreg@fr.ibm.com gkurz@linux.vnet.ibm.com Software Engineer @ IBM/Meiosys http://www.ibm.com Tel +33 (0)562 165 496 "Anarchy is about taking complete responsibility for yourself." Alan Moore.