From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60891) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Z4I-0008Rb-70 for qemu-devel@nongnu.org; Fri, 27 Jun 2014 12:32:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X0Z4B-0006KL-En for qemu-devel@nongnu.org; Fri, 27 Jun 2014 12:32:06 -0400 Received: from smtp3.rz.tu-harburg.de ([134.28.202.138]:33934) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X0Z4B-0006Jv-5d for qemu-devel@nongnu.org; Fri, 27 Jun 2014 12:31:59 -0400 Date: Fri, 27 Jun 2014 18:33:03 +0200 From: Reza Jelveh Message-ID: <20140627163303.GC9177@masterlulz.fritz.box> References: <1403825329-21942-1-git-send-email-reza.jelveh@tuhh.de> <53AD8C6A.3040709@redhat.com> <53AD99A5.7000707@suse.de> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="Pd0ReVV5GZGQvF3a" Content-Disposition: inline In-Reply-To: <53AD99A5.7000707@suse.de> Subject: Re: [Qemu-devel] [PATCH] ahci.c: mask the interrupt on complete flag to allow ahci.c to read the correct size for the PRDT List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Reza Jelveh , John Snow , qemu-devel@nongnu.org --Pd0ReVV5GZGQvF3a Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On 27/06/14 18:19, Alexander Graf wrote: > I do agree that this should have been in the patch description. Reza, > could you please repost this with a proper patch description and as a > checkpatch.pl compliant patch? Also please CC me on the next iteration :). Sorry about this, I didn't see it when I posted the 2nd version of the patch. New version is attached. --Pd0ReVV5GZGQvF3a Content-Type: text/x-diff; charset=us-ascii Content-Disposition: attachment; filename="0001-ahci.c-mask-the-interrupt-on-complete-flag-to-allow-.patch" >>From fd18e0a7f287cbe176dbb98a530dd54ea3cc27c7 Mon Sep 17 00:00:00 2001 From: Reza Jelveh Date: Fri, 27 Jun 2014 01:13:19 +0200 Subject: [PATCH] ahci.c: mask the interrupt on complete flag to allow ahci.c to read the correct size for the PRDT The last PRDT usually sets the I bit set, but qemu does not emulate it. The I bit needs to be masked when interpreting the length. Signed-off-by: Reza Jelveh --- hw/ide/ahci.c | 12 +++++++++--- hw/ide/ahci.h | 2 ++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 9bae22e..93aa981 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -639,6 +639,12 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis) } } +static int prdt_tbl_entry_size(const AHCI_SG tbl) +{ + return (le32_to_cpu(tbl.flags_size) & AHCI_PRDT_SIZE_MASK) + 1; +} + + static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset) { AHCICmdHdr *cmd = ad->cur_cmd; @@ -681,7 +687,7 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset) sum = 0; for (i = 0; i < sglist_alloc_hint; i++) { /* flags_size is zero-based */ - tbl_entry_size = (le32_to_cpu(tbl[i].flags_size) + 1); + tbl_entry_size = prdt_tbl_entry_size(tbl[i]); if (offset <= (sum + tbl_entry_size)) { off_idx = i; off_pos = offset - sum; @@ -700,12 +706,12 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset) qemu_sglist_init(sglist, qbus->parent, (sglist_alloc_hint - off_idx), ad->hba->as); qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos), - le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos); + prdt_tbl_entry_size(tbl[off_idx]) - off_pos); for (i = off_idx + 1; i < sglist_alloc_hint; i++) { /* flags_size is zero-based */ qemu_sglist_add(sglist, le64_to_cpu(tbl[i].addr), - le32_to_cpu(tbl[i].flags_size) + 1); + prdt_tbl_entry_size(tbl[i])); } } diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h index 9a4064f..f418b30 100644 --- a/hw/ide/ahci.h +++ b/hw/ide/ahci.h @@ -201,6 +201,8 @@ #define AHCI_COMMAND_TABLE_ACMD 0x40 +#define AHCI_PRDT_SIZE_MASK 0x3fffff + #define IDE_FEATURE_DMA 1 #define READ_FPDMA_QUEUED 0x60 -- 1.9.2 --Pd0ReVV5GZGQvF3a--