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Date: Thu, 3 Jul 2014 23:47:04 +0100
From: Al Viro <viro@ZenIV.linux.org.uk>
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Sender: Al Viro <viro@ftp.linux.org.uk>
Subject: Re: [Qemu-devel] [RFC] alpha qemu arithmetic exceptions
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To: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>, QEMU Developers <qemu-devel@nongnu.org>

On Thu, Jul 03, 2014 at 01:19:19PM -0700, Richard Henderson wrote:
> > Grr...  Wrong check, obviously - we want to check that tmp + MSB(tmp2) is 0.
> > Something like
> > 	setcond_32	tmp2, tmp2, zero, TCG_COND_LT
> > 	add_i32		tmp, tmp2, tmp
> > 	call		helper_IOV_if_not_zero tmp
> > for 32bit ones and
> > 	setcond_64	tmp2, vc, zero, TCG_COND_LT
> > 	add_i64		tmp, tmp2, tmp
> > 	call		helper_IOV_if_not_zero tmp
> > for 64bit ones, or would it be better just to pass both arguments to helper
> > and let it deal with the check?  I'm not familiar enough with TCG, sorry...
> > 
> 
> I believe I have a tidy solution to these /v insns.  New patch set shortly.

Hmm...
+            tcg_gen_eqv_i64(tmp, va, vb);
+            tcg_gen_mov_i64(tmp2, va);
+            tcg_gen_add_i64(vc, va, vb);
+            tcg_gen_xor_i64(tmp2, tmp2, vc);
+            tcg_gen_and_i64(tmp, tmp, tmp2);
+            tcg_gen_shri_i64(tmp, tmp, 63);
+            tcg_gen_movi_i64(tmp2, 0);
+            gen_helper_check_overflow(cpu_env, tmp, tmp2);

How can that be correct?  Suppose a = b = 0.  We get
tcg_gen_eqv_i64(tmp, va, vb);	->	tmp = -1
tcg_gen_mov_i64(tmp2, va);	->	tmp2 = 0
tcg_gen_add_i64(vc, va, vb);	->	c = 0
tcg_gen_xor_i64(tmp2, tmp2, vc);->	tmp2 = 0
tcg_gen_and_i64(tmp, tmp, tmp2);->	tmp = -1
tcg_gen_shri_i64(tmp, tmp, 63);	->	tmp = 1
tcg_gen_movi_i64(tmp2, 0);	->	tmp2 = 0
gen_helper_check_overflow(cpu_env, tmp, tmp2);	-> not equal, overflow.

What am I missing here?