From: Al Viro <viro@ZenIV.linux.org.uk>
To: Richard Henderson <rth@twiddle.net>
Cc: Peter Maydell <peter.maydell@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [RFC] alpha qemu arithmetic exceptions
Date: Mon, 7 Jul 2014 16:06:29 +0100 [thread overview]
Message-ID: <20140707150629.GZ18016@ZenIV.linux.org.uk> (raw)
In-Reply-To: <53BAAAAE.2060009@twiddle.net>
On Mon, Jul 07, 2014 at 07:11:58AM -0700, Richard Henderson wrote:
> A couple of points here:
>
> 1) We should never raise this in user-only mode. In that mode, we emulate the
> whole fpu stack, all the way through from HW to the OS completion handler.
How is that different from other cases where we have an exception raised
by an fp operation?
> 2) Because of that, we have the capability of doing the same thing in system
> mode. This lets us do more of the computation in the host, and less in the
> guest, which is faster. The only thing this makes more difficult is debugging
> the OS completion handlers within the kernel, since they'll only get invoked
> when SIGFPE needs to be sent.
Umm... The effect of software completion depends on current->ieee_state;
how would you keep track of that outside of guest kernel?
> 3) If we do want to implement a mode where we faithfully send SWC for all of
> the bits of IEEE that real HW didn't implement, do we really need to avoid a
> store to the output register when signalling this? I.e. can we notice this
> condition after the fact with float_flag_input_denormal, rather than having
> another function call to prep the inputs?
But flag_input_denormal is raised only when we do have DNZ set. Which is
an entirely different case, where we should not (and do not) get an exception
at all...
next prev parent reply other threads:[~2014-07-07 15:06 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-24 4:34 [Qemu-devel] [RFC] alpha qemu arithmetic exceptions Al Viro
2014-06-24 16:52 ` Al Viro
2014-06-24 18:33 ` Richard Henderson
2014-06-24 20:32 ` Al Viro
2014-06-24 20:57 ` Richard Henderson
2014-06-24 21:24 ` Al Viro
2014-06-24 21:32 ` Richard Henderson
2014-06-25 7:01 ` Al Viro
2014-06-25 9:27 ` Peter Maydell
2014-06-25 14:26 ` Al Viro
2014-06-25 17:41 ` Peter Maydell
2014-06-26 5:55 ` Al Viro
2014-06-30 18:39 ` Richard Henderson
2014-06-30 20:56 ` Al Viro
2014-07-01 4:34 ` Al Viro
2014-07-01 5:00 ` Al Viro
2014-07-01 14:31 ` Richard Henderson
2014-07-01 17:03 ` Richard Henderson
2014-07-01 17:50 ` Al Viro
2014-07-01 18:23 ` Peter Maydell
2014-07-01 18:30 ` Richard Henderson
2014-07-01 19:08 ` Peter Maydell
2014-07-02 4:05 ` Al Viro
2014-07-02 5:50 ` Al Viro
2014-07-02 6:17 ` Al Viro
2014-07-02 15:26 ` Richard Henderson
2014-07-02 15:49 ` Al Viro
2014-07-02 14:59 ` Richard Henderson
2014-07-02 15:20 ` Al Viro
2014-07-03 6:51 ` Al Viro
2014-07-03 18:25 ` Al Viro
2014-07-03 20:19 ` Richard Henderson
2014-07-03 22:47 ` Al Viro
2014-07-03 23:05 ` Peter Maydell
2014-07-03 23:22 ` Al Viro
2014-07-04 0:50 ` Al Viro
2014-07-04 4:30 ` Richard Henderson
2014-07-04 7:29 ` Al Viro
2014-07-05 1:40 ` Al Viro
2014-07-05 5:26 ` Al Viro
2014-07-05 21:09 ` Al Viro
2014-07-05 22:55 ` Al Viro
2014-07-07 14:11 ` Richard Henderson
2014-07-07 15:06 ` Al Viro [this message]
2014-07-07 16:20 ` Richard Henderson
2014-07-08 4:20 ` Al Viro
2014-07-08 6:03 ` Richard Henderson
2014-07-08 6:54 ` Al Viro
2014-07-08 7:13 ` Al Viro
2014-07-08 8:05 ` Peter Maydell
2014-07-08 14:53 ` Richard Henderson
2014-07-08 16:13 ` Al Viro
2014-07-08 16:33 ` Peter Maydell
2014-07-08 17:20 ` Al Viro
2014-07-08 19:32 ` Peter Maydell
2014-07-08 20:12 ` Al Viro
2014-07-09 9:19 ` Alex Bennée
2014-07-09 9:04 ` Alex Bennée
2014-07-08 18:12 ` Richard Henderson
2014-07-08 19:02 ` Al Viro
2014-07-08 19:04 ` Richard Henderson
2014-07-08 20:20 ` Al Viro
2014-07-09 4:59 ` Richard Henderson
2014-07-09 5:47 ` Al Viro
2014-07-09 15:14 ` Richard Henderson
2014-07-09 16:41 ` Al Viro
2014-06-24 18:23 ` Richard Henderson
2014-06-24 20:47 ` Al Viro
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