From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52948) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGrH2-0003zC-Pz for qemu-devel@nongnu.org; Mon, 11 Aug 2014 11:12:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XGrGt-0001Dj-LI for qemu-devel@nongnu.org; Mon, 11 Aug 2014 11:12:36 -0400 Received: from mail-wi0-x22b.google.com ([2a00:1450:400c:c05::22b]:54667) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGrGt-0001DX-Fp for qemu-devel@nongnu.org; Mon, 11 Aug 2014 11:12:27 -0400 Received: by mail-wi0-f171.google.com with SMTP id hi2so4412278wib.16 for ; Mon, 11 Aug 2014 08:12:26 -0700 (PDT) Date: Mon, 11 Aug 2014 16:12:23 +0100 From: Stefan Hajnoczi Message-ID: <20140811151223.GF496@stefanha-thinkpad.redhat.com> References: <1407515016-26273-1-git-send-email-mark.cave-ayland@ilande.co.uk> <1407515016-26273-6-git-send-email-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="Il7n/DHsA0sMLmDu" Content-Disposition: inline In-Reply-To: <1407515016-26273-6-git-send-email-mark.cave-ayland@ilande.co.uk> Subject: Re: [Qemu-devel] [PATCH 5/5] cmd646: synchronise UDMA interrupt status with DMA interrupt status List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland Cc: kwolf@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com --Il7n/DHsA0sMLmDu Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Aug 08, 2014 at 05:23:36PM +0100, Mark Cave-Ayland wrote: > @@ -322,6 +342,10 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev) > } > =20 > /* Set write-to-clear interrupt bits */ > + dev->wmask[CFR] =3D 0x0; > + dev->w1cmask[CFR] =3D CFR_INTR_CH0; > + dev->wmask[ARTTIM23] =3D 0x0; > + dev->w1cmask[ARTTIM23] =3D ARTTIM23_INTR_CH1; > dev->wmask[MRDMODE] =3D 0x0; > dev->w1cmask[MRDMODE] =3D MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1; It is not clear to me why the mask for MRDMODE has both Channel 0 and 1 but the ARTTIM23 and CFR masks only have one channel each. Please post a link to the datasheet. --Il7n/DHsA0sMLmDu Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBAgAGBQJT6N1XAAoJEJykq7OBq3PIN8wH/R1B9MR3OS8T5We+jZEyT0ze 5/c1sEdVK6d5K/tMfPg8MGoUMLf0haMyTG5Sse2yd+/SPm/kmrmGXhzAu2TitlPo Z2eO9A6uFk42fI1kFrK/yWj7kYfOHY7AXPf+J4kKqSFnvDaKlZaBYjfj5vVU11Bu gqW16A3Xcj7FNSgPNt2E5An4YhvCz56ZQP/uC29Ne8Tw8NFWjbhx5bc0sNxNxY/3 /TssdanWnFZl2eHfM5BTkM15WtixLQcEdMTDuSvEqfqQNnJGWpI/yGTcC+1P1PYP yAVmU/V1tULmjGSi59GNoDqSxgm/ayLqjuWUWGvuA2tDbG7lxE99PLyizj1BU5Y= =6cPY -----END PGP SIGNATURE----- --Il7n/DHsA0sMLmDu--