From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53130) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGrHZ-0004NW-OD for qemu-devel@nongnu.org; Mon, 11 Aug 2014 11:13:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XGrHT-0001TE-E3 for qemu-devel@nongnu.org; Mon, 11 Aug 2014 11:13:09 -0400 Received: from mail-wg0-x234.google.com ([2a00:1450:400c:c00::234]:42592) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGrHT-0001T0-7k for qemu-devel@nongnu.org; Mon, 11 Aug 2014 11:13:03 -0400 Received: by mail-wg0-f52.google.com with SMTP id a1so8533385wgh.11 for ; Mon, 11 Aug 2014 08:13:02 -0700 (PDT) Date: Mon, 11 Aug 2014 16:13:00 +0100 From: Stefan Hajnoczi Message-ID: <20140811151300.GG496@stefanha-thinkpad.redhat.com> References: <1407515016-26273-1-git-send-email-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="IuhbYIxU28t+Kd57" Content-Disposition: inline In-Reply-To: <1407515016-26273-1-git-send-email-mark.cave-ayland@ilande.co.uk> Subject: Re: [Qemu-devel] [PATCH 0/5] cmd646 tidy-up and interrupt status fixes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland Cc: kwolf@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com --IuhbYIxU28t+Kd57 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Aug 08, 2014 at 05:23:31PM +0100, Mark Cave-Ayland wrote: > This patchset came out of my work trying to boot NetBSD on SPARC64. >=20 > According to the datasheet, the 646U2 UDMA interrupt status bits are exac= t=20 > mirrors of the normal DMA interrupt status bits, and an interrupt can be > cleared by writing a 1 to the relevant bit in PCI configuration space. >=20 > The existing implementation caused NetBSD to fail since it would always c= heck > and clear the normal DMA interrupt status bit, even if UDMA was being use= d. > Hence this patchset ensures that the current interrupt status is always= =20 > consistent between both normal DMA and UDMA registers, including when eit= her=20 > one of the interrupt status bits is cleared by writing to PCI configurati= on=20 > space. >=20 > Signed-off-by: Mark Cave-Ayland >=20 > Mark Cave-Ayland (5): > cmd646: add constants for CNTRL register access > cmd646: synchronise DMA interrupt status with UDMA interrupt status > cmd646: switch cmd646_update_irq() to accept PCIDevice instead of > PCIIDEState > cmd646: allow MRDMODE interrupt status bits clearing from PCI config > space > cmd646: synchronise UDMA interrupt status with DMA interrupt status >=20 > hw/ide/cmd646.c | 94 +++++++++++++++++++++++++++++++++++++++++++++++++= ------ > 1 file changed, 85 insertions(+), 9 deletions(-) Looks good but I don't know the CMD646 registers. I left a question about the last patch. --IuhbYIxU28t+Kd57 Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBAgAGBQJT6N18AAoJEJykq7OBq3PIXrkIAIFU3cb2Dqlfk+6um/4cw2uB e/aJS6jM90ZcG0Fdd5WUaIFNErd/e5ycH/2uj0i1aPLoxZkTnAGng7EX7H1Xd2GW subou4eu27PHau8pruZT5UF/1pH17X63TsGWGfPEH+4Yn+mNBUNzK5vxJxrJGTdQ 0NwoYMQWful28Y20FIBqibYLfHSe58ObqnRV1g/OL5SqjGjUT0pUAqCFj9JfsqhY wLIIKiU4jRofJtro4IzkrUqfPumXrgOsyymHx54FCgI9RUTBNiuAzK/xo5sZ7vYu /k77dUweYjVu4gvfmW89ACyor0SF8fcEBxpuf/4JgLRBopszvBtsiNKc96kAjgY= =VPfI -----END PGP SIGNATURE----- --IuhbYIxU28t+Kd57--