From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39087) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGsFR-0007b4-50 for qemu-devel@nongnu.org; Mon, 11 Aug 2014 12:15:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XGsFL-0003uz-N4 for qemu-devel@nongnu.org; Mon, 11 Aug 2014 12:15:01 -0400 Received: from mail-wg0-x22a.google.com ([2a00:1450:400c:c00::22a]:34669) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XGsFL-0003ut-Fs for qemu-devel@nongnu.org; Mon, 11 Aug 2014 12:14:55 -0400 Received: by mail-wg0-f42.google.com with SMTP id l18so8626774wgh.13 for ; Mon, 11 Aug 2014 09:14:54 -0700 (PDT) Date: Mon, 11 Aug 2014 17:14:51 +0100 From: Stefan Hajnoczi Message-ID: <20140811161451.GH496@stefanha-thinkpad.redhat.com> References: <1407186691-16103-1-git-send-email-jsnow@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="KscVNZbUup0vZz0f" Content-Disposition: inline In-Reply-To: <1407186691-16103-1-git-send-email-jsnow@redhat.com> Subject: Re: [Qemu-devel] [PATCH v2 00/30] AHCI test suite framework List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: John Snow Cc: pbonzini@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, mst@redhat.com --KscVNZbUup0vZz0f Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Aug 04, 2014 at 05:11:01PM -0400, John Snow wrote: > This patch series introduces a number of small fixes and tweaks to > help support an AHCI test suite that in the future I hope to expand > to a fuller regression suite to help guide the development of the > AHCI device support under, in particular, the Q35 machine type in QEMU. >=20 > Paolo Bonzini has contributed a number of cleanup and refactoring patches > that support changes to the PIO setup FIS packet construction code, which > is necessary for testing ths specification adherence of the IDENTIFY comm= and, > which issues its data exclusively via PIO mechanisms. >=20 > The ahci-test code being checked in represents a minimum of functionality > needed in order to issue and receive commands from the AHCI HBA under the > libqos / qtest environment. >=20 > In V2, as detailed below, these tests are not currently expected to pass. > I will post a complementary patch outside of this set that highlights > the exact set of tests that will not pass, which can help verify at least > the portions of these tests that do work correctly. >=20 > Assertions that currently fail: > - Ordering of PCI capabilities as defined by either AHCI or Intel ICH9 > - Boot-time values of the PxTFD register, which should not have valid > data until after a D2H FIS is received, but does in Qemu 2.1 > - Boot-time values of the PxSIG register, which should have a specific > placeholder signature until the first D2H FIS is received, but is > currently blank. > - The "Descriptor Processed" interrupt is expected after the IDENTIFY > command exhausts the given PRDT, but is not seen. Thanks, I have merged patches up to and including Patch 24 onto my block tree: https://github.com/stefanha/qemu/commits/block This should make it easier to manage the next revision of the series where we can focus on the qtest test cases. Stefan --KscVNZbUup0vZz0f Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBAgAGBQJT6Ov7AAoJEJykq7OBq3PIabUH/inUFfMqMYu091O8NaLIlwrX Zea7WaC0X6ms1dMdLLWtc9H2vzlboEjIxHsjOBnpDWt56JLGDXaVxI1RWi1VgOgG iuhYcg+oN5DN4+ENKgTlNb3wp7hU/NXRFkHdIRD4fCSKvNSRDTG3HYW5f+jKDl3B A6xh6nVWNB5ajzJRylA+rP38RRTyFqkhKGjkFCqGM5Ct3nKk0tKySmicVjwRQrYF Zx99CGy0268WoKizADGn10/VQaROls5K/SMSmSmg7InsFHYCOLhO64sxJFU39YoZ cvsSrnSO05eH2mNCf9gXxluaolSDgwL+Eh5vbdGQIiw5tqm8X+QHz610UlVDDi0= =nzTT -----END PGP SIGNATURE----- --KscVNZbUup0vZz0f--