* [Qemu-devel] [PATCH][RESEND] pci: Use bus master address space for delivering MSI/MSI-X, messages
@ 2014-08-13 6:14 Jan Kiszka
2014-08-13 9:29 ` Michael S. Tsirkin
0 siblings, 1 reply; 2+ messages in thread
From: Jan Kiszka @ 2014-08-13 6:14 UTC (permalink / raw)
To: Michael S. Tsirkin, qemu-devel; +Cc: Paolo Bonzini
The spec says (and real HW confirms this) that, if the bus master bit
is 0, the device will not generate any PCI accesses. MSI and MSI-X
messages fall among these, so we should use the corresponding address
space to deliver them. This will prevent delivery if bus master support
is disabled.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/pci/msi.c | 2 +-
hw/pci/msix.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci/msi.c b/hw/pci/msi.c
index a4a3040..52d2313 100644
--- a/hw/pci/msi.c
+++ b/hw/pci/msi.c
@@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector)
"notify vector 0x%x"
" address: 0x%"PRIx64" data: 0x%"PRIx32"\n",
vector, msg.address, msg.data);
- stl_le_phys(&address_space_memory, msg.address, msg.data);
+ stl_le_phys(&dev->bus_master_as, msg.address, msg.data);
}
/* Normally called by pci_default_write_config(). */
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index 5c49bfc..20ae476 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -439,7 +439,7 @@ void msix_notify(PCIDevice *dev, unsigned vector)
msg = msix_get_message(dev, vector);
- stl_le_phys(&address_space_memory, msg.address, msg.data);
+ stl_le_phys(&dev->bus_master_as, msg.address, msg.data);
}
void msix_reset(PCIDevice *dev)
--
1.8.1.1.298.ge7eed54
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH][RESEND] pci: Use bus master address space for delivering MSI/MSI-X, messages
2014-08-13 6:14 [Qemu-devel] [PATCH][RESEND] pci: Use bus master address space for delivering MSI/MSI-X, messages Jan Kiszka
@ 2014-08-13 9:29 ` Michael S. Tsirkin
0 siblings, 0 replies; 2+ messages in thread
From: Michael S. Tsirkin @ 2014-08-13 9:29 UTC (permalink / raw)
To: Jan Kiszka; +Cc: Paolo Bonzini, qemu-devel
On Wed, Aug 13, 2014 at 08:14:30AM +0200, Jan Kiszka wrote:
> The spec says (and real HW confirms this) that, if the bus master bit
> is 0, the device will not generate any PCI accesses. MSI and MSI-X
> messages fall among these, so we should use the corresponding address
> space to deliver them. This will prevent delivery if bus master support
> is disabled.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Thanks, I already have this queued.
> ---
> hw/pci/msi.c | 2 +-
> hw/pci/msix.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci/msi.c b/hw/pci/msi.c
> index a4a3040..52d2313 100644
> --- a/hw/pci/msi.c
> +++ b/hw/pci/msi.c
> @@ -291,7 +291,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector)
> "notify vector 0x%x"
> " address: 0x%"PRIx64" data: 0x%"PRIx32"\n",
> vector, msg.address, msg.data);
> - stl_le_phys(&address_space_memory, msg.address, msg.data);
> + stl_le_phys(&dev->bus_master_as, msg.address, msg.data);
> }
>
> /* Normally called by pci_default_write_config(). */
> diff --git a/hw/pci/msix.c b/hw/pci/msix.c
> index 5c49bfc..20ae476 100644
> --- a/hw/pci/msix.c
> +++ b/hw/pci/msix.c
> @@ -439,7 +439,7 @@ void msix_notify(PCIDevice *dev, unsigned vector)
>
> msg = msix_get_message(dev, vector);
>
> - stl_le_phys(&address_space_memory, msg.address, msg.data);
> + stl_le_phys(&dev->bus_master_as, msg.address, msg.data);
> }
>
> void msix_reset(PCIDevice *dev)
> --
> 1.8.1.1.298.ge7eed54
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