Re: [Qemu-devel] [PATCH 0/2] add check for PCIe root ports and downstream ports

["Michael S. Tsirkin" <mst@redhat.com>]

On Tue, Aug 19, 2014 at 09:08:25PM +0800, arei.gonglei@huawei.com wrote:
> From: Gonglei <arei.gonglei@huawei.com>
> 
> Root ports and downstream ports of switches are the hot
> pluggable ports in a PCI Express hierarchy. 
> PCI Express supports chip-to-chip interconnect, a PCIe link can 
> only connect one pci device/Switch/EndPoint or PCI-bridge.
> 
> 7.3. Configuration Transaction Rules (PCI Express specification 3.0)
> 7.3.1. Device Number
> 
> Downstream Ports that do not have ARI Forwarding enabled must 
> associate only Device 0 with the device attached to the Logical Bus
> representing the Link from the Port.
> 
> Right now, ARI Forwarding dose not support. So, only slot 0 is
> supported, regardless of hotplug or coldplug.

I'd rather we added ARI support in bridges (if that's
what you mean) than APIs for the sole purpose of
disabling functionality we'll want to re-enable later.

We have the beginning of an implementation for ARI (pcie_ari_init).



> So, adding check about slot 0 for PCIe downstream ports and
> root ports, which avoid useless operation, both hotplug and
> coldplug.
> 
> Gonglei (2):
>   qdev: Introduce a function to get qbus's parent
>   pci: add check for pcie root ports and downstream ports
> 
>  hw/core/qdev.c         |  7 +++++++
>  hw/pci/pci.c           | 41 +++++++++++++++++++++++++++++++++++++++++
>  include/hw/qdev-core.h |  1 +
>  3 files changed, 49 insertions(+)
> 
> -- 
> 1.7.12.4
>