From: "Michael S. Tsirkin" <mst@redhat.com>
To: Knut Omang <knut.omang@oracle.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
Stefan Hajnoczi <stefanha@redhat.com>,
Laszlo Ersek <lersek@redhat.com>, Alexander Graf <agraf@suse.de>,
qemu-devel@nongnu.org, Fabien Chouteau <chouteau@adacore.com>,
Luiz Capitulino <lcapitulino@redhat.com>,
Beniamino Galvani <b.galvani@gmail.com>,
Alex Williamson <alex.williamson@redhat.com>,
"Gonglei (Arei)" <arei.gonglei@huawei.com>,
Jan Kiszka <jan.kiszka@web.de>,
Anthony Liguori <aliguori@amazon.com>,
Paolo Bonzini <pbonzini@redhat.com>, Amos Kong <akong@redhat.com>,
Gabriel Somlo <somlo@cmu.edu>,
qemu-stable@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 2/4] pci: Avoid losing config updates to MSI/MSIX cap regs
Date: Tue, 2 Sep 2014 15:57:29 +0300 [thread overview]
Message-ID: <20140902125729.GA14127@redhat.com> (raw)
In-Reply-To: <1409655606-19150-3-git-send-email-knut.omang@oracle.com>
On Tue, Sep 02, 2014 at 01:00:04PM +0200, Knut Omang wrote:
> Introduce an extra local variable to avoid that the
> shifting in the for loop causes updates to msi/msix capability
> registers to get lost in pci_default_write_config.
>
> Signed-off-by: Knut Omang <knut.omang@oracle.com>
OK
So this is a regression introduced by:
commit 95d658002401e2e47a5404298ebe9508846e8a39
Author: Jan Kiszka <jan.kiszka@siemens.com>
Date: Fri May 11 11:42:40 2012 -0300
msi: Invoke msi/msix_write_config from PCI core
Will queue to qemu-stable as well.
> ---
> hw/pci/pci.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> index 6b21dee..af547dc 100644
> --- a/hw/pci/pci.c
> +++ b/hw/pci/pci.c
> @@ -1146,9 +1146,10 @@ uint32_t pci_default_read_config(PCIDevice *d,
> return le32_to_cpu(val);
> }
>
> -void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
> +void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int l)
> {
> int i, was_irq_disabled = pci_irq_disabled(d);
> + uint32_t val = val_in;
>
> for (i = 0; i < l; val >>= 8, ++i) {
> uint8_t wmask = d->wmask[addr + i];
> @@ -1170,8 +1171,8 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
> & PCI_COMMAND_MASTER);
> }
>
> - msi_write_config(d, addr, val, l);
> - msix_write_config(d, addr, val, l);
> + msi_write_config(d, addr, val_in, l);
> + msix_write_config(d, addr, val_in, l);
> }
>
> /***********************************************************/
> --
> 1.9.0
next prev parent reply other threads:[~2014-09-02 12:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-02 11:00 [Qemu-devel] [PATCH v2 0/4] pcie: Add support for Single Root I/O Virtualization Knut Omang
2014-09-02 11:00 ` [Qemu-devel] [PATCH v2 1/4] pci: Make use of the devfn property when registering new devices Knut Omang
2014-09-02 13:03 ` Michael S. Tsirkin
2014-09-02 13:44 ` Knut Omang
2014-09-02 13:55 ` Michael S. Tsirkin
2014-10-03 11:59 ` Knut Omang
2014-09-02 11:00 ` [Qemu-devel] [PATCH v2 2/4] pci: Avoid losing config updates to MSI/MSIX cap regs Knut Omang
2014-09-02 12:57 ` Michael S. Tsirkin [this message]
2014-09-02 11:00 ` [Qemu-devel] [PATCH v2 3/4] pci: Update pci_regs header Knut Omang
2014-09-02 11:00 ` [Qemu-devel] [PATCH v2 4/4] pcie: Add support for Single Root I/O Virtualization (SR/IOV) Knut Omang
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