From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47231) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XQuvi-0005Aa-4j for qemu-devel@nongnu.org; Mon, 08 Sep 2014 05:08:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XQuvZ-00023o-4q for qemu-devel@nongnu.org; Mon, 08 Sep 2014 05:08:10 -0400 Received: from mail-we0-x22b.google.com ([2a00:1450:400c:c03::22b]:59605) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XQuvY-00023f-To for qemu-devel@nongnu.org; Mon, 08 Sep 2014 05:08:01 -0400 Received: by mail-we0-f171.google.com with SMTP id x48so1712098wes.2 for ; Mon, 08 Sep 2014 02:08:00 -0700 (PDT) Date: Mon, 8 Sep 2014 10:07:56 +0100 From: Stefan Hajnoczi Message-ID: <20140908090756.GF7638@stefanha-thinkpad.redhat.com> References: <53F704BE.6000407@mrs.ro> <5402DD88.5010600@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="vKFfOv5t3oGVpiF+" Content-Disposition: inline In-Reply-To: <5402DD88.5010600@gmail.com> Subject: Re: [Qemu-devel] [PATCH] IDE: MMIO IDE device control should be little endian List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Valentin Manea Cc: kwolf@redhat.com, Paolo Bonzini , mjt@tls.msk.ru, "qemu-devel@nongnu.org" , stefanha@redhat.com --vKFfOv5t3oGVpiF+ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sun, Aug 31, 2014 at 11:32:08AM +0300, Valentin Manea wrote: >=20 > Set the IDE MMIO memory type to little endian. The ATA specs identify > words part of the control commands encoded as little endian. > While this has no impact on little endian systems, it's required for big > endian systems(eg OpenRisc). >=20 > Signed-off-by: Valentin Manea > --- > hw/ide/mmio.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c > index 01c1d0e..334c8cc 100644 > --- a/hw/ide/mmio.c > +++ b/hw/ide/mmio.c > @@ -82,7 +82,7 @@ static void mmio_ide_write(void *opaque, hwaddr addr, > static const MemoryRegionOps mmio_ide_ops =3D { > .read =3D mmio_ide_read, > .write =3D mmio_ide_write, > - .endianness =3D DEVICE_NATIVE_ENDIAN, > + .endianness =3D DEVICE_LITTLE_ENDIAN, > }; >=20 > static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr, > @@ -102,7 +102,7 @@ static void mmio_ide_cmd_write(void *opaque, hwaddr > addr, > static const MemoryRegionOps mmio_ide_cs_ops =3D { > .read =3D mmio_ide_status_read, > .write =3D mmio_ide_cmd_write, > - .endianness =3D DEVICE_NATIVE_ENDIAN, > + .endianness =3D DEVICE_LITTLE_ENDIAN, > }; >=20 > static const VMStateDescription vmstate_ide_mmio =3D { This patch changes the semantics of the sh4eb target (with the r2d machine type), where the mmio-ide registers currently don't need byteswapping. I guess a real big-endian SH4 with MMIO IDE *should* byteswap but want to double-check. Does anyone know what the expected behavior here is? Stefan --vKFfOv5t3oGVpiF+ Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAEBAgAGBQJUDXHsAAoJEJykq7OBq3PITOEH/j3r4MH/KP42IOlSwczCKH5k FfXTcq87Z28bsuHulxXy42dqYID1gqDQWcXmpgJYVfE5H6o8hHR6//DiIrCnKxry oG2x3bIShDl3PDGAzeCwDiTMen6ObGyroPDxG/QBQkBOS2GyUl3t7G8sHcFEqPAb JyXzhLi3NaO5wNMASvY29KmwUH5unj+z8DMbNH9mv5Pea2NPrW1z1+nfWPjLDJrh MIdYvtQXr2BGXAmXNvkGwzwfSM+gs42yyMBxn2NSxYtRHViyU0U8QebQ35intARv 2Z1UrYo1dmXSAndNuPz1PQqg3Zpz7om62J6AwoFbaCfwQDfMZVT3ULtYUcauY9A= =7QPK -----END PGP SIGNATURE----- --vKFfOv5t3oGVpiF+--